Yehowshua Immanuel
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4c8298f2a1
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update README and remove BRAM experiments
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2024-05-19 22:20:53 -04:00 |
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Yehowshua Immanuel
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cf68a5e683
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converted to bluespec haskell
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2024-05-19 22:16:33 -04:00 |
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Yehowshua Immanuel
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72788b8436
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using bluespec classic for BRAM testbench
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2024-05-19 01:14:17 -04:00 |
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Yehowshua Immanuel
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10ed5b8751
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ready for demo
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2024-03-20 03:30:28 -04:00 |
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Yehowshua Immanuel
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83f78d1c3d
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add comment
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2024-03-20 02:52:44 -04:00 |
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Yehowshua Immanuel
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423ea6142e
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improve some indentation in src/Top.bsv
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2024-03-20 02:49:08 -04:00 |
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Yehowshua Immanuel
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95631e77b8
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update README with instructions for simulating main core
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2024-03-20 02:48:49 -04:00 |
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Yehowshua Immanuel
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338cdac474
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Remove .DS_Store files
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2024-03-20 02:39:13 -04:00 |
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Yehowshua Immanuel
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aad8289d4e
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now with info on how to simulate experimental BRAM
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2024-03-20 02:37:24 -04:00 |
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Yehowshua Immanuel
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e44f6b083b
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it's been a while
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2024-03-20 02:25:31 -04:00 |
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Yehowshua Immanuel
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9f90b00b25
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wow - loopback in sim actually worksgit status
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2023-09-28 06:57:38 -04:00 |
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Yehowshua Immanuel
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ad1bdfc8b1
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fix typos and improve spaces
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2023-09-26 00:41:21 -04:00 |
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Yehowshua Immanuel
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c3c2cd53e1
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working towards sim uart-like device support
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2023-09-26 00:40:04 -04:00 |
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Yehowshua Immanuel
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dc11528567
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sim now working
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2023-09-25 20:21:23 -04:00 |
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Yehowshua Immanuel
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3be337c4d6
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restore hopefully all remaining pragmas
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2023-09-25 03:44:40 -04:00 |
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Yehowshua Immanuel
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e0b5d55387
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restore missing pragma
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2023-09-25 03:37:13 -04:00 |
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Yehowshua Immanuel
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257507e3fa
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conversion complete
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2023-09-25 03:34:21 -04:00 |
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Yehowshua Immanuel
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1209f6a700
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now converted clock divider
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2023-09-25 02:45:27 -04:00 |
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Yehowshua Immanuel
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b1c14f5aba
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first commit
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2023-09-23 02:08:37 -04:00 |
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