26 lines
791 B
Haskell
26 lines
791 B
Haskell
package Uart(
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mkUartPhy,
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UartPhy(..)
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) where
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import Serializer
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import Deserializer
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import BusTypes
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import Util
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-- Out is out from the FPGA and In is in to the FPGA
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interface (UartPhy :: # -> # -> *) clkFreq baudRate =
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bitOut :: Bit 1
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bitIn :: Bit 1 -> Action
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mkUartPhy :: (BusTypes.BusServer inFlightTransactions numClients)
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-> Module (UartPhy clkFreq baudRate)
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mkUartPhy dedicatedServerInterface = do
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fileHandle :: Handle <- openFile "mkUartPhy.log" WriteMode
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deserializer :: Deserializer clkFreq baudRate <- mkDeserialize fileHandle
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serializer :: Serializer clkFreq baudRate <- mkSerialize fileHandle
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return |>
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interface UartPhy
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bitOut = 1
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bitIn bitVal = do
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deserializer.putBitIn bitVal |