now parsing memory statements

src/RTLILParser/AST.hs

@@ -1,9 +1,12 @@
 module RTLILParser.AST(
-    AutoIdxStmt(..),    ParamStmt(..),  AutogenId(..),
-    Constant(..),       CellStmt(..),   PublicId(..),
-    AttrStmt(..),       Value(..),      Id(..),
-    CellId(..),         CellType(..),   WireId(..),
-    SigSpec(..),        Slice(..)
+    AutoIdxStmt(..)    ,ParamStmt(..)  ,AutogenId(..)
+   ,Constant(..)       ,CellStmt(..)   ,PublicId(..)
+   ,AttrStmt(..)       ,Value(..)      ,Id(..)
+   ,CellId(..)         ,CellType(..)   ,WireId(..)
+   ,SigSpec(..)        ,Slice(..)      ,ConnStmt(..)
+   ,WireOption(..)     ,WireStmt(..)   ,Wire(..)
+   ,MemoryOption(..)   ,MemoryStmt(..) ,Memory(..)
+   ,MemoryID(..)
     ) where
 import Text.Read (Lexeme(Ident))
 import Data.Functor.Contravariant (Contravariant)
@@ -15,13 +18,30 @@ data Slice          = Slice         Int (Maybe Int) deriving (Show)
 data Id             = Public    PublicId
                     | Autogen   AutogenId
                     deriving (Show)
-data WireId         = WireId    Id
-                    deriving (Show)
+data WireId         = WireId    Id deriving (Show)
+data MemoryID       = MemoryID  Id deriving (Show)
 data AutoIdxStmt    = AutoIdxStmt   Int     deriving (Show)
-data AttrStmt       = AttrStmt  Id Constant deriving (Show)
-data CellStmt       = CellStmt  CellId CellType  deriving (Show)
-data CellId         = CellId    Id deriving (Show)
-data CellType       = CellType  Id deriving (Show)
+data AttrStmt       = AttrStmt      Id Constant deriving (Show)
+data CellStmt       = CellStmt      CellId CellType  deriving (Show)
+data CellId         = CellId        Id deriving (Show)
+data CellType       = CellType      Id deriving (Show)
+data ConnStmt       = ConnStmt      SigSpec SigSpec deriving (Show)
+data WireOption     = WireOptionWidth   Int
+                    | WireOptionOffset  Int
+                    | WireOptionInput   Int
+                    | WireOptionOutput  Int
+                    | WireOptionInout   Int 
+                    | WireOptionUpto
+                    | WireOptionSigned
+                    deriving (Show)
+data WireStmt       = WireStmt      WireId [WireOption] deriving (Show)
+data Wire           = Wire          WireStmt [AttrStmt] deriving (Show)
+data MemoryOption   = MemoryOptionWidth     Int
+                    | MemoryOptionSize      Int
+                    | MemoryOptionOffset    Int
+                    deriving (Show)
+data MemoryStmt     = MemoryStmt    MemoryID [MemoryOption] deriving (Show)
+data Memory         = Memory        MemoryStmt [AttrStmt] deriving (Show)
 data SigSpec        = SigSpecConstant   Constant
                     | SigSpecWireId     WireId
                     | SigSpecSlice      SigSpec Slice

src/RTLILParser/Parser.hs

@@ -7,11 +7,14 @@ import Control.Monad (void)
 import Text.Parsec
 import Text.Parsec.String (Parser)
 import RTLILParser.AST(
-    AutoIdxStmt(..),    ParamStmt(..),  AutogenId(..),
-    Constant(..),       CellStmt(..),   PublicId(..),
-    AttrStmt(..),       Value(..),      Id(..),
-    CellId(..),         CellType(..),   WireId(..),
-    SigSpec(..),        Slice(..)
+    AutoIdxStmt(..)    ,ParamStmt(..)  ,AutogenId(..)
+   ,Constant(..)       ,CellStmt(..)   ,PublicId(..)
+   ,AttrStmt(..)       ,Value(..)      ,Id(..)
+   ,CellId(..)         ,CellType(..)   ,WireId(..)
+   ,SigSpec(..)        ,Slice(..)      ,ConnStmt(..)
+   ,WireOption(..)     ,WireStmt(..)   ,Wire(..)
+   ,MemoryOption(..)   ,MemoryStmt(..) ,Memory(..)
+   ,MemoryID(..)
     )
 import Util(binaryStringToInt)
 import RTLILParser.Primitives(pEscapedChar)
@@ -141,6 +144,59 @@ pSigSpec =
     try pSigSpecConcat -- Check for concatenation first
     <|> pSingleSigSpec -- Otherwise parse a single sigspec
 
+pConnStmt :: Parser ConnStmt
+pConnStmt = ConnStmt
+    <$> (string "connect" *> pWs *> pSigSpec)
+    <*> (pWs *> pSigSpec)
+    <*  pEol
+
+pWireOption :: Parser WireOption
+pWireOption =
+    try (WireOptionWidth  <$> (string "width"  *> pWs *> pInteger)) <|> 
+    try (WireOptionOffset <$> (string "offset" *> pWs *> pInteger)) <|> 
+    try (WireOptionInput  <$> (string "input"  *> pWs *> pInteger)) <|> 
+    try (WireOptionOutput <$> (string "output" *> pWs *> pInteger)) <|> 
+    try (WireOptionInout  <$> (string "inout"  *> pWs *> pInteger)) <|> 
+    (string "upto"      *> return WireOptionUpto)                   <|> 
+    (string "signed"    *> return WireOptionSigned)
+
+pWireStmt :: Parser WireStmt
+pWireStmt = 
+    WireStmt
+    <$  string "wire" 
+    <*  pWs
+    <*> (WireId <$> pId)
+    <*  pWs
+    <*> many pWireOption
+    <*  pEol
+
+pWire :: Parser Wire
+pWire = do
+    attrs <- many pAttrStmt
+    wireStmt <- pWireStmt
+    return $ Wire wireStmt attrs
+
+pMemoryOption :: Parser MemoryOption
+pMemoryOption = 
+    try (MemoryOptionWidth  <$> (string "width"  *> pWs *> pInteger)) <|> 
+    try (MemoryOptionSize   <$> (string "size"   *> pWs *> pInteger)) <|> 
+    try (MemoryOptionOffset <$> (string "offset" *> pWs *> pInteger))
+
+pMemoryStmt :: Parser MemoryStmt
+pMemoryStmt = 
+    MemoryStmt
+    <$  string "memory" 
+    <*  pWs
+    <*> (MemoryID <$> pId)
+    <*  pWs
+    <*> many pMemoryOption
+    <*  pEol
+
+pMemory :: Parser Memory
+pMemory = do
+    attrs <- many pAttrStmt
+    memoryStmt <- pMemoryStmt
+    return $ Memory memoryStmt attrs
 
 -- would correspond to `123456789[0:9][0:8]`
 exampleSigSpecSlice =