From 38fb13556f11de4043eb85c44c75c21fc8439cb0 Mon Sep 17 00:00:00 2001 From: Yehowshua Immanuel Date: Fri, 6 Dec 2024 14:57:32 -0500 Subject: [PATCH] now parsing memory statements --- app/Main.hs | 3 +- atoms.txt | 14 ++++----- default.nix | 1 + haskellator.cabal | 1 + src/RTLILParser/AST.hs | 42 ++++++++++++++++++------- src/RTLILParser/Parser.hs | 66 ++++++++++++++++++++++++++++++++++++--- 6 files changed, 103 insertions(+), 24 deletions(-) diff --git a/app/Main.hs b/app/Main.hs index 0f7ddaa..9331192 100644 --- a/app/Main.hs +++ b/app/Main.hs @@ -3,6 +3,7 @@ module Main where import System.Environment (getArgs) import System.IO import Control.Exception (catch, IOException) +import Text.Show.Pretty (ppShow) import Haskellator @@ -19,7 +20,7 @@ main = do putStrLn "File Contents:" putStrLn contents [] -> putStrLn "cabal run Haskellator -- " - putStrLn $ show Haskellator.val + putStrLn $ ppShow Haskellator.val -- Handle potential file reading errors handleReadError :: IOException -> IO String diff --git a/atoms.txt b/atoms.txt index 90a8c27..031d4c2 100644 --- a/atoms.txt +++ b/atoms.txt @@ -5,8 +5,8 @@ - [x] ::= “0” | “1” | “2” | “3” | “4” | “5” | “6” | “7” | “8” | “9” - [x] ::= “0” | “1” | “x” | “z” | “m” | “-“ - [x] ::= “-“? + - - [ ] ::= ? * - [x] ::= “autoidx” + - [ ] ::= ? * - [ ] ::= * - [x] ::= “module” - [ ] ::= ( | | | | )* @@ -14,12 +14,12 @@ - [x] ::= | | - [x] ::= “end” - [x] ::= “attribute” - - [ ] ::= | | “[” (“:” )? “]” | “{” * “}” - - [ ] ::= “connect” - - [ ] ::= * - - [ ] ::= “wire” * - - [ ] ::= - - [ ] ::= “width” | “offset” | “input” | “output” | “inout” | “upto” | “signed” + - [x] ::= | | “[” (“:” )? “]” | “{” * “}” + - [x] ::= “connect” + - [x] ::= * + - [x] ::= “wire” * + - [x] ::= + - [x] ::= “width” | “offset” | “input” | “output” | “inout” | “upto” | “signed” - [ ] ::= * - [ ] ::= “memory” * - [ ] ::= “width” | “size” | “offset” diff --git a/default.nix b/default.nix index 191acfb..f85fc0c 100644 --- a/default.nix +++ b/default.nix @@ -10,6 +10,7 @@ let haskellPackages.filepath haskellPackages.pretty-show haskellPackages.prettyprinter + haskellPackages.pretty-show ]; in haskellPackages.mkDerivation { diff --git a/haskellator.cabal b/haskellator.cabal index 470317b..7c39fa6 100644 --- a/haskellator.cabal +++ b/haskellator.cabal @@ -86,6 +86,7 @@ executable rtlil-parse -- Other library packages from which modules are imported. build-depends: base ^>=4.17.2.1, + pretty-show >=1.6, haskellator -- Directories containing source files. diff --git a/src/RTLILParser/AST.hs b/src/RTLILParser/AST.hs index 95ba77d..ffdaa7f 100644 --- a/src/RTLILParser/AST.hs +++ b/src/RTLILParser/AST.hs @@ -1,9 +1,12 @@ module RTLILParser.AST( - AutoIdxStmt(..), ParamStmt(..), AutogenId(..), - Constant(..), CellStmt(..), PublicId(..), - AttrStmt(..), Value(..), Id(..), - CellId(..), CellType(..), WireId(..), - SigSpec(..), Slice(..) + AutoIdxStmt(..) ,ParamStmt(..) ,AutogenId(..) + ,Constant(..) ,CellStmt(..) ,PublicId(..) + ,AttrStmt(..) ,Value(..) ,Id(..) + ,CellId(..) ,CellType(..) ,WireId(..) + ,SigSpec(..) ,Slice(..) ,ConnStmt(..) + ,WireOption(..) ,WireStmt(..) ,Wire(..) + ,MemoryOption(..) ,MemoryStmt(..) ,Memory(..) + ,MemoryID(..) ) where import Text.Read (Lexeme(Ident)) import Data.Functor.Contravariant (Contravariant) @@ -15,13 +18,30 @@ data Slice = Slice Int (Maybe Int) deriving (Show) data Id = Public PublicId | Autogen AutogenId deriving (Show) -data WireId = WireId Id - deriving (Show) +data WireId = WireId Id deriving (Show) +data MemoryID = MemoryID Id deriving (Show) data AutoIdxStmt = AutoIdxStmt Int deriving (Show) -data AttrStmt = AttrStmt Id Constant deriving (Show) -data CellStmt = CellStmt CellId CellType deriving (Show) -data CellId = CellId Id deriving (Show) -data CellType = CellType Id deriving (Show) +data AttrStmt = AttrStmt Id Constant deriving (Show) +data CellStmt = CellStmt CellId CellType deriving (Show) +data CellId = CellId Id deriving (Show) +data CellType = CellType Id deriving (Show) +data ConnStmt = ConnStmt SigSpec SigSpec deriving (Show) +data WireOption = WireOptionWidth Int + | WireOptionOffset Int + | WireOptionInput Int + | WireOptionOutput Int + | WireOptionInout Int + | WireOptionUpto + | WireOptionSigned + deriving (Show) +data WireStmt = WireStmt WireId [WireOption] deriving (Show) +data Wire = Wire WireStmt [AttrStmt] deriving (Show) +data MemoryOption = MemoryOptionWidth Int + | MemoryOptionSize Int + | MemoryOptionOffset Int + deriving (Show) +data MemoryStmt = MemoryStmt MemoryID [MemoryOption] deriving (Show) +data Memory = Memory MemoryStmt [AttrStmt] deriving (Show) data SigSpec = SigSpecConstant Constant | SigSpecWireId WireId | SigSpecSlice SigSpec Slice diff --git a/src/RTLILParser/Parser.hs b/src/RTLILParser/Parser.hs index faa5ee4..5286147 100644 --- a/src/RTLILParser/Parser.hs +++ b/src/RTLILParser/Parser.hs @@ -7,11 +7,14 @@ import Control.Monad (void) import Text.Parsec import Text.Parsec.String (Parser) import RTLILParser.AST( - AutoIdxStmt(..), ParamStmt(..), AutogenId(..), - Constant(..), CellStmt(..), PublicId(..), - AttrStmt(..), Value(..), Id(..), - CellId(..), CellType(..), WireId(..), - SigSpec(..), Slice(..) + AutoIdxStmt(..) ,ParamStmt(..) ,AutogenId(..) + ,Constant(..) ,CellStmt(..) ,PublicId(..) + ,AttrStmt(..) ,Value(..) ,Id(..) + ,CellId(..) ,CellType(..) ,WireId(..) + ,SigSpec(..) ,Slice(..) ,ConnStmt(..) + ,WireOption(..) ,WireStmt(..) ,Wire(..) + ,MemoryOption(..) ,MemoryStmt(..) ,Memory(..) + ,MemoryID(..) ) import Util(binaryStringToInt) import RTLILParser.Primitives(pEscapedChar) @@ -141,6 +144,59 @@ pSigSpec = try pSigSpecConcat -- Check for concatenation first <|> pSingleSigSpec -- Otherwise parse a single sigspec +pConnStmt :: Parser ConnStmt +pConnStmt = ConnStmt + <$> (string "connect" *> pWs *> pSigSpec) + <*> (pWs *> pSigSpec) + <* pEol + +pWireOption :: Parser WireOption +pWireOption = + try (WireOptionWidth <$> (string "width" *> pWs *> pInteger)) <|> + try (WireOptionOffset <$> (string "offset" *> pWs *> pInteger)) <|> + try (WireOptionInput <$> (string "input" *> pWs *> pInteger)) <|> + try (WireOptionOutput <$> (string "output" *> pWs *> pInteger)) <|> + try (WireOptionInout <$> (string "inout" *> pWs *> pInteger)) <|> + (string "upto" *> return WireOptionUpto) <|> + (string "signed" *> return WireOptionSigned) + +pWireStmt :: Parser WireStmt +pWireStmt = + WireStmt + <$ string "wire" + <* pWs + <*> (WireId <$> pId) + <* pWs + <*> many pWireOption + <* pEol + +pWire :: Parser Wire +pWire = do + attrs <- many pAttrStmt + wireStmt <- pWireStmt + return $ Wire wireStmt attrs + +pMemoryOption :: Parser MemoryOption +pMemoryOption = + try (MemoryOptionWidth <$> (string "width" *> pWs *> pInteger)) <|> + try (MemoryOptionSize <$> (string "size" *> pWs *> pInteger)) <|> + try (MemoryOptionOffset <$> (string "offset" *> pWs *> pInteger)) + +pMemoryStmt :: Parser MemoryStmt +pMemoryStmt = + MemoryStmt + <$ string "memory" + <* pWs + <*> (MemoryID <$> pId) + <* pWs + <*> many pMemoryOption + <* pEol + +pMemory :: Parser Memory +pMemory = do + attrs <- many pAttrStmt + memoryStmt <- pMemoryStmt + return $ Memory memoryStmt attrs -- would correspond to `123456789[0:9][0:8]` exampleSigSpecSlice =