Artturin/riscv-bluespec-classic
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  • 23b5de5cd3 flake: Fix bluespec bsc binary addflake Artturin 2025-04-04 17:21:59 +0300
  • d8ca756e43 flake.lock: Update Artturin 2025-04-04 16:55:42 +0300
  • 8b6ca3accc flake: Install the same file that fpga-starter-project-uart installed Artturin 2025-04-03 22:27:27 +0300
  • 7836ac5f3f Make make fpga work Artturin 2025-04-02 03:10:29 +0300
  • d48621521a Remove all trailing spaces Artturin 2025-04-02 03:04:44 +0300
  • 41c1e910dd Add initial flake Artturin 2025-04-02 02:59:21 +0300
  • 6247ae3b70 clean unused experiments repair_tag_engine Yehowshua Immanuel 2025-03-25 08:48:43 -0400
  • 0452f44fbd alternate approach not so successful repair_tag_engine_alternate Yehowshua Immanuel 2025-03-25 08:35:17 -0400
  • e89254ebef eliminate warnings Yehowshua Immanuel 2025-03-25 08:03:04 -0400
  • ed8e0b8337 tag engine now allows from simultaneous retire and request - but had to use unsafe Yehowshua Immanuel 2025-03-25 01:15:49 -0400
  • 5588fafebd refactor into standalone TagEngineTester Yehowshua Immanuel 2025-03-24 23:23:39 -0400
  • 6e3b3e9178 Preliminary cleaning before repairing TagEngine Yehowshua Immanuel 2025-03-24 22:46:42 -0400
  • 7c32974f7b update readme main Yehowshua Immanuel 2025-03-24 08:24:06 -0400
  • 76e542ff36 tested and seems to be working Yehowshua Immanuel 2025-03-23 18:45:32 -0400
  • 35fc49382d reverting as it seems we really cant condition rules on arguments safely Yehowshua Immanuel 2025-03-23 18:30:56 -0400
  • 996febbff5 change interface Yehowshua Immanuel 2025-03-23 17:58:56 -0400
  • e6b002f70e added informative comment Yehowshua Immanuel 2025-03-23 08:12:40 -0400
  • c5ad62aaed Greatly simpliflied tag engine to use stack implementation. Having trouble guarding on interface argument... Yehowshua Immanuel 2025-03-23 08:12:24 -0400
  • 8e27ca877f beginning of a linked list in hardware Yehowshua Immanuel 2025-03-20 17:00:15 -0400
  • 7ad812d3da refactor a bit Yehowshua Immanuel 2025-03-20 13:27:01 -0400
  • 5f2d9456ae Tag engine building Yehowshua Immanuel 2025-03-20 06:28:55 -0400
  • ac48f5a4ad unable to display fshow for tagVec Yehowshua Immanuel 2025-03-20 00:10:00 -0400
  • 6359ab833d tag types and moodularity improving Yehowshua Immanuel 2025-03-19 23:08:58 -0400
  • 4422947f9a TageEngine now typechecks Yehowshua Immanuel 2025-03-19 22:10:14 -0400
  • a3afd66715 begun work on tag engine Yehowshua Immanuel 2025-03-17 12:04:42 -0400
  • 550b3731b4 still workikng on Bus types Yehowshua Immanuel 2025-03-17 09:16:22 -0400
  • 21a3ee7f7a initial support for Bus types Yehowshua Immanuel 2025-03-14 19:46:08 -0400
  • 66464daf0c Update README.md Yehowshua 2025-03-14 16:30:45 +0000
  • 258534808c correct README indentation Yehowshua Immanuel 2024-05-19 22:21:33 -0400
  • 4c8298f2a1 update README and remove BRAM experiments Yehowshua Immanuel 2024-05-19 22:20:53 -0400
  • cf68a5e683 converted to bluespec haskell Yehowshua Immanuel 2024-05-19 22:16:33 -0400
  • 72788b8436 using bluespec classic for BRAM testbench Yehowshua Immanuel 2024-05-19 01:14:17 -0400
  • 10ed5b8751 ready for demo Yehowshua Immanuel 2024-03-20 03:30:28 -0400
  • 83f78d1c3d add comment Yehowshua Immanuel 2024-03-20 02:52:44 -0400
  • 423ea6142e improve some indentation in src/Top.bsv Yehowshua Immanuel 2024-03-20 02:49:08 -0400
  • 95631e77b8 update README with instructions for simulating main core Yehowshua Immanuel 2024-03-20 02:48:49 -0400
  • 338cdac474 Remove .DS_Store files Yehowshua Immanuel 2024-03-20 02:39:13 -0400
  • aad8289d4e now with info on how to simulate experimental BRAM Yehowshua Immanuel 2024-03-20 02:37:24 -0400
  • e44f6b083b it's been a while Yehowshua Immanuel 2024-03-20 02:25:31 -0400
  • 9f90b00b25 wow - loopback in sim actually worksgit status Yehowshua Immanuel 2023-09-28 06:57:38 -0400
  • ad1bdfc8b1 fix typos and improve spaces Yehowshua Immanuel 2023-09-26 00:41:21 -0400
  • c3c2cd53e1 working towards sim uart-like device support Yehowshua Immanuel 2023-09-26 00:40:04 -0400
  • dc11528567 sim now working Yehowshua Immanuel 2023-09-25 20:21:23 -0400
  • 3be337c4d6 restore hopefully all remaining pragmas Yehowshua Immanuel 2023-09-25 03:44:40 -0400
  • e0b5d55387 restore missing pragma Yehowshua Immanuel 2023-09-25 03:37:13 -0400
  • 257507e3fa conversion complete Yehowshua Immanuel 2023-09-25 03:34:21 -0400
  • 1209f6a700 now converted clock divider Yehowshua Immanuel 2023-09-25 02:45:27 -0400
  • b1c14f5aba first commit Yehowshua Immanuel 2023-09-23 02:08:37 -0400