beginning of a linked list in hardware

This commit is contained in:
Yehowshua Immanuel 2025-03-20 17:00:15 -04:00
parent 7ad812d3da
commit 8e27ca877f

View file

@ -9,9 +9,15 @@ import Util
data Tag numTags
= Next UIntLog2N(numTags)
| Freed
| Tail
deriving (Bits, Eq, FShow)
data TagPtr numTags
= SomeTagPtr UIntLog2N(numTags)
| None
deriving (Bits, Eq, FShow)
interface (TagEngine :: # -> *) numTags =
requestTag :: ActionValue UIntLog2N(numTags)
retireTag :: UIntLog2N(numTags) -> Action
@ -32,10 +38,10 @@ initTagTail = do
return t
initTagVec :: Module(Vector numTags (Reg (Tag numTags)))
initTagVec =
initTagVec =
let
lastIdx :: Integer = (fromInteger |> valueOf numTags) - 1
initByIdx currIdx =
initByIdx currIdx =
if (currIdx < lastIdx)
then initTagNext (currIdx + 1)
else initTagTail
@ -48,6 +54,9 @@ mkTagEngine =
tagVec :: Vector numTags (Reg (Tag numTags))
tagVec <- initTagVec
head :: Reg(TagPtr(numTags)) <- mkReg(SomeTagPtr(0))
tail :: Reg(TagPtr(numTags)) <- mkReg(SomeTagPtr(lastIdx))
debugOnce <- mkReg True
addRules $
@ -61,11 +70,28 @@ mkTagEngine =
return $
interface TagEngine
requestTag :: ActionValue UIntLog2N(numTags)
requestTag = do
-- placeholder
counter := counter + 1
return counter
requestTag =
do
let currHeadPtr :: UIntLog2N(numTags) =
case head of
SomeTagPtr ptr -> ptr
-- we technically will never hit this arm
-- due to when guard `SomeTagPtr ptr <- head`
None -> 0
let currHead :: (Reg (Tag numTags)) = (select tagVec currHeadPtr)
let nextHeadPtr :: UIntLog2N(numTags) =
case currHead of
Next ptr -> ptr
-- TODO : handle tail correctly
Tail -> 0
currHead := Freed
head := SomeTagPtr(nextHeadPtr)
return nextHeadPtr
when
SomeTagPtr ptr <- head
retireTag :: UIntLog2N(numTags) -> Action
retireTag tag = do
-- placeholder
counter := 0
where
lastIdx :: UIntLog2N(numTags) = (fromInteger |> valueOf numTags) - 1