29 lines
311 B
Plaintext
29 lines
311 B
Plaintext
$date
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Sat Feb 6 19:39:57 2016
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$end
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$version
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Icarus Verilog
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$end
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$timescale
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1s
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$end
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$scope module simple_tb $end
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$scope module s $end
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$var wire 4 ! A [3:0] $end
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$var wire 4 " B [3:0] $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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$dumpvars
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b11 "
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b1010 !
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$end
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#50
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b101 "
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b1100 !
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#150
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b0 "
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b0 !
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#250
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