RiscV-Formal/hs
2025-03-04 23:43:35 -05:00
..
Isa works even better now 2025-02-19 18:28:08 -05:00
Peripherals bus architecture re-built I think 2025-02-26 13:05:02 -05:00
Bus.hs initial support for exceptions 2025-03-02 23:12:02 -05:00
BusTypes.hs initial support for exceptions 2025-03-02 23:12:02 -05:00
Cpu.hs now using bus and new FetchResult type 2025-03-04 23:37:33 -05:00
Exceptions.hs save progress before switching to new bus architecture 2025-03-04 08:12:59 -05:00
Fetch.hs replace/update relevant fetch types and functions 2025-03-04 23:43:35 -05:00
RegFiles.hs initial support for exceptions 2025-03-02 23:12:02 -05:00
Simulation.hs replace/update relevant fetch types and functions 2025-03-04 23:43:35 -05:00
Types.hs hopefully progressing to a more scalable bus architecture 2025-02-25 14:24:54 -05:00