Yehowshua/RiscV-Formal
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Handle Compressed Instructions #3

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opened 2025-02-20 01:24:50 +00:00 by Yehowshua · 2 comments
Yehowshua commented 2025-02-20 01:24:50 +00:00
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If fetching from IO, we only fetch 16 bits sequentially.

This is slow but should be OK since we should only ever fetch from IO during boot-up from maybe a SPI.

If fetching from IO, we only fetch 16 bits sequentially. This is slow but should be OK since we should only ever fetch from IO during boot-up from maybe a SPI.
Yehowshua commented 2025-02-20 01:29:06 +00:00
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I think the fetch unit itself should be responsible for assembling 32 bit instructions.

I think the fetch unit itself should be responsible for assembling 32 bit instructions.
Yehowshua commented 2025-02-26 00:13:52 +00:00
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Will not support.

Will not support.
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Reference: Yehowshua/RiscV-Formal#3
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