now fetching from ram correctly as ram is 32 bit word not byte indexed

README.md

@@ -25,6 +25,11 @@ essence forms the context of our micro-op machinery.
 
 Change instructions to support Nix
 
+## Disassembling
+```
+riscv64-unknown-elf-objdump -D -b binary -m riscv:rv64 ./rv_tests/hello_world/hello.bin > hello.asm
+```
+
 
 # TODO
  - [ ] fetch should invoke mem read function

hs/Bus.hs

@@ -56,7 +56,7 @@ read :: ReadRequest -> Peripherals -> IO ReadResponse
 read (Request addr size) peripherals
   | not (alignCheck addr size) = return |> Left UnAligned
   | (addr >= ramStart) && (addr <= ramEnd) =
-      return |> Right |> Peripherals.Ram.read size ramAddr (ram peripherals)
+      return |> Right |> Peripherals.Ram.read size ramWordAddr (ram peripherals)
   | (addr >= uartStart) && (addr <= uartEnd) =
       fmap Right (Peripherals.Uart.read size uartAddr)
   | otherwise = return |> Left UnMapped
@@ -64,6 +64,8 @@ read (Request addr size) peripherals
       ramAddrNoOffset = addr - ramStart
       ramAddr :: RamAddr
       ramAddr = resize ramAddrNoOffset
+      ramWordAddr :: RamAddr
+      ramWordAddr = resize |> ramAddrNoOffset `shiftR` 2
 
       uartAddrNoOffset = addr - uartStart
       uartAddr :: UartAddr

hs/Simulation.hs

@@ -46,6 +46,7 @@ simulationLoop n machine = do
   fetchResult <- fetchInstruction machinePeripherals currPc
   let decodeResult = decode fetchResult
   putStrLn |> show decodeResult P.++ debugInsn fetchResult
+  putStrLn $ "PC: " P.++ show currPc
   let pc' = currPc + 4
       cpu' = (cpu machine) { pc = pc' }
       machine' = machine { cpu = cpu' }