Yehowshua/RiscV-Formal
Archived
2
0
Fork 0
Code Issues 8 Pull requests Projects Releases Packages Wiki Activity Actions

reduce debug in sim and add PREFIX to makefile

Browse source
This commit is contained in:
Yehowshua Immanuel 2025-03-07 22:04:40 -05:00
parent 63a73d3f71
commit 171fcece98
2 changed files with 5 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

9
rv_tests/hello_world/Makefile
View file

@ -1,8 +1,9 @@
# RISC-V toolchain
CC = riscv64-unknown-elf-gcc
AS = riscv64-unknown-elf-as
LD = riscv64-unknown-elf-ld
OBJCOPY = riscv64-unknown-elf-objcopy
PREFIX = riscv64-unknown-elf
CC = $(PREFIX)-gcc
AS = $(PREFIX)-as
LD = $(PREFIX)-ld
OBJCOPY = $(PREFIX)-objcopy
QEMU = qemu-system-riscv64
# Compilation flags