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Add support for fork scopes #21

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oscargus merged 1 commit from fork into main 2023-10-06 14:42:54 +00:00
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oscargus commented 2023-10-06 06:27:17 +00:00 (Migrated from github.com)
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Based on 18.2.3.4 $scope of the Verilog standard, there is a fifth scope type: fork, which at least ModelSim outputs.

Based on 18.2.3.4 $scope of the Verilog standard, there is a fifth scope type: `fork`, which at least ModelSim outputs.
TheZoq2 commented 2023-10-06 08:55:44 +00:00 (Migrated from github.com)
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Interesting, what do the fork scopes do?

Interesting, what do the fork scopes do?
oscargus commented 2023-10-06 12:07:18 +00:00 (Migrated from github.com)
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It is used to model parallel events. Not sure why ModelSim uses it though (if I recall correctly it splits records into forks in the VCD).

It is used to model parallel events. Not sure why ModelSim uses it though (if I recall correctly it splits records into forks in the VCD).
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Reference: Yehowshua/FastWaveBackend#21
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