notable restructuring

tests/vcd-files/VCD_file_with_errors.vcd

@@ -0,0 +1,92 @@
+$date
+Thu Dec 17 17:19:03 2020
+$end
+$version
+Aldec HDL Simulator Version 10.03.3558
+$end
+$timescale
+1 ps
+$end
+
+$scope module tb $end
+
+$scope module t $end
+$var wire 1 ! CLK $end
+$var wire 1 " LED $end
+$var wire 1 # PIN_10 $end
+$var wire 1 $ PIN_11 $end
+$var wire 1 % PIN_12 $end
+$var wire 1 & PIN_13 $end
+$var wire 1 ' SPI_In $end
+$var wire 1 ( SPI_Out $end
+$var wire 1 ) SPI_Data_Available $end
+$var wire 1 * RegMap_In $end
+$var wire 1 + RegMap_Out $end
+$var wire 1 , RegMap_Data_Available $end
+$var wire 8 - AddrBus [7:0] $end
+$var wire 8 . DataBus [7:0] $end
+
+$scope module controller $end
+$var wire 1 ! clk $end
+$var wire 1 " LED $end
+$var wire 8 . DataBus [7:0] $end
+$var wire 1 ) SPI_Data_Available $end
+$var wire 1 , RegMap_Data_available $end
+$var wire 8 / addr [7:0] $end
+$var wire 8 0 data [7:0] $end
+$var wire 1 1 BusActive $end
+$var reg 8 2 AddrBus [7:0] $end
+$var reg 1 3 SPI_In $end
+$var reg 1 4 SPI_Out $end
+$var reg 1 5 RegMap_In $end
+$var reg 1 6 RegMap_Out $end
+$var reg 1 7 LED_state $end
+$var reg 3 8 block [2:0] $end
+$var reg 3 9 doing [2:0] $end
+$var parameter 3 : IDLE $end
+$var parameter 3 ; READ_ADDR $end
+$var parameter 3 < READ_DATA $end
+$var parameter 3 = TX $end
+$var parameter 3 > SPI $end
+$upscope $end
+
+
+$scope module reg_mag_i $end
+$var wire 1 ! clk $end
+$var wire 1 + RegMap_Out $end
+$var wire 1 * RegMap_In $end
+$var wire 8 - AddrBus [7:0] $end
+$var wire 8 . DataBus [7:0] $end
+$var wire 1 ? r_w $end
+$var wire 1 @ outputData $end
+$var wire 1 A inputData $end
+$var reg 1 B RegMap_Data_Available $end
+$var reg 8 C inData [7:0] $end
+$var reg 8 D inAddr [7:0] $end
+$var reg 8 E outData [7:0] $end
+$var reg 1 F addr_rcv $end
+$var reg 1 G data_rcv $end
+$var reg 2 H state [1:0] $end
+$var parameter 2 I INIT $end
+$var parameter 2 J IDLE $end
+$var parameter 2 K RX $end
+$var parameter 2 L TX $end
+$var parameter 32 M MAXADDRESS $end
+$upscope $end
+
+
+$scope module SPI_i $end
+$var wire 1 ! clk $end
+$var wire 1 # SCK $end
+$var wire 1 $ SSEL $end
+$var wire 1 % MOSI $end
+$var wire 1 & MISO $end
+$var wire 1 ' SPI_In $end
+$var wire 1 ( SPI_Out $end
+$var wire 8 - AddrBus [7:0] $end
+$var wire 8 . DataBus [7:0] $end
+$var wire 1 N SCK_risingedge $end
+$var wire 1 O SCK_fallingedge $end
+$var wire 1 P SSEL_active $end
+$var wire 1 Q MOSI_data $end
+$var reg 1 R SPI_Data_Available $end

tests/vcd-files/amaranth/up_counter.vcd

@@ -0,0 +1,287 @@
+$comment Generated by Amaranth $end
+$date 2022-07-13 18:48:57.685239 $end
+$timescale 1 ps $end
+$scope module bench $end
+$scope module top $end
+$var wire 1 ! clk $end
+$var wire 1 " rst $end
+$var wire 1 # ovf $end
+$var wire 16 $ count $end
+$var string 1 % state $end
+$var wire 1 & en $end
+$upscope $end
+$upscope $end
+$enddefinitions $end
+#0
+$dumpvars
+0!
+0"
+0#
+b0 $
+sTOP/0 %
+0&
+$end
+#500000
+1!
+#1000000
+0!
+#1500000
+1!
+#2000000
+0!
+#2500000
+1!
+#3000000
+0!
+#3500000
+1!
+#4000000
+0!
+#4500000
+1!
+#5000000
+0!
+#5500000
+1!
+#6000000
+0!
+#6500000
+1!
+#7000000
+0!
+#7500000
+1!
+#8000000
+0!
+#8500000
+1!
+#9000000
+0!
+#9500000
+1!
+#10000000
+0!
+#10500000
+1!
+#11000000
+0!
+#11500000
+1!
+#12000000
+0!
+#12500000
+1!
+#13000000
+0!
+#13500000
+1!
+#14000000
+0!
+#14500000
+1!
+#15000000
+0!
+#15500000
+1!
+#16000000
+0!
+#16500000
+1!
+#17000000
+0!
+#17500000
+1!
+#18000000
+0!
+#18500000
+1!
+#19000000
+0!
+#19500000
+1!
+#20000000
+0!
+#20500000
+1!
+#21000000
+0!
+#21500000
+1!
+#22000000
+0!
+#22500000
+1!
+#23000000
+0!
+#23500000
+1!
+#24000000
+0!
+#24500000
+1!
+#25000000
+0!
+#25500000
+1!
+#26000000
+0!
+#26500000
+1!
+#27000000
+0!
+#27500000
+1!
+#28000000
+0!
+#28500000
+1!
+#29000000
+0!
+#29500000
+1!
+#30000000
+0!
+#30500000
+1&
+1!
+#31000000
+0!
+#31500000
+sBOTTOM/2 %
+b1 $
+1!
+#32000000
+0!
+#32500000
+b10 $
+1!
+#33000000
+0!
+#33500000
+b11 $
+1!
+#34000000
+0!
+#34500000
+b100 $
+1!
+#35000000
+0!
+#35500000
+b101 $
+1!
+#36000000
+0!
+#36500000
+b110 $
+1!
+#37000000
+0!
+#37500000
+b111 $
+1!
+#38000000
+0!
+#38500000
+b1000 $
+1!
+#39000000
+0!
+#39500000
+b1001 $
+1!
+#40000000
+0!
+#40500000
+b1010 $
+1!
+#41000000
+0!
+#41500000
+b1011 $
+1!
+#42000000
+0!
+#42500000
+b1100 $
+1!
+#43000000
+0!
+#43500000
+b1101 $
+1!
+#44000000
+0!
+#44500000
+b1110 $
+1!
+#45000000
+0!
+#45500000
+b1111 $
+1!
+#46000000
+0!
+#46500000
+b10000 $
+1!
+#47000000
+0!
+#47500000
+b10001 $
+1!
+#48000000
+0!
+#48500000
+b10010 $
+1!
+#49000000
+0!
+#49500000
+b10011 $
+1!
+#50000000
+0!
+#50500000
+b10100 $
+1!
+#51000000
+0!
+#51500000
+b10101 $
+1!
+#52000000
+0!
+#52500000
+b10110 $
+1!
+#53000000
+0!
+#53500000
+b10111 $
+1!
+#54000000
+0!
+#54500000
+b11000 $
+1!
+#55000000
+0!
+#55500000
+1#
+b11001 $
+1!
+#56000000
+0!
+#56500000
+sTOP/0 %
+0#
+b0 $
+1!
+#57000000
+0!
+#57500000
+sBOTTOM/2 %
+b1 $
+1!
+#58000000

tests/vcd-files/ghdl/alu.vcd

@@ -0,0 +1,768 @@
+$date
+  Mon Nov 25 19:21:45 2019
+$end
+$version
+  GHDL v0
+$end
+$timescale
+  1 fs
+$end
+$var reg 32 ! op1[31:0] $end
+$var reg 32 " op2[31:0] $end
+$var reg 1 # cin $end
+$var reg 2 $ cmd[1:0] $end
+$var reg 32 % res[31:0] $end
+$var reg 1 & cout $end
+$var reg 1 ' z $end
+$var reg 1 ( n $end
+$var reg 1 ) v $end
+$var reg 1 * vdd $end
+$var reg 1 + vss $end
+$scope module instance $end
+$var reg 32 , op1[31:0] $end
+$var reg 32 - op2[31:0] $end
+$var reg 1 . cin $end
+$var reg 2 / cmd[1:0] $end
+$var reg 32 0 res[31:0] $end
+$var reg 1 1 cout $end
+$var reg 1 2 z $end
+$var reg 1 3 n $end
+$var reg 1 4 v $end
+$var reg 1 5 vdd $end
+$var reg 1 6 vss $end
+$var reg 32 7 res_temp[31:0] $end
+$var reg 1 8 c31 $end
+$var reg 1 9 c_out $end
+$upscope $end
+$enddefinitions $end
+#0
+b01111111111111111111101001111100 !
+b01111001011110100001111000101101 "
+1#
+b00 $
+b11111001011110100001100010101010 %
+0&
+0'
+1(
+1)
+0*
+0+
+b01111111111111111111101001111100 ,
+b01111001011110100001111000101101 -
+1.
+b00 /
+b11111001011110100001100010101010 0
+01
+02
+13
+14
+05
+06
+b11111001011110100001100010101010 7
+18
+09
+#10000
+b11010101010001010001100011100101 !
+b10001001011101010011001010010110 "
+0#
+b01011110101110100100101101111011 %
+1&
+0(
+1)
+b11010101010001010001100011100101 ,
+b10001001011101010011001010010110 -
+0.
+b01011110101110100100101101111011 0
+11
+03
+14
+b01011110101110100100101101111011 7
+08
+19
+#20000
+b00101010001001100010110100100001 !
+b10010101101011010001111100001110 "
+b10111111110100110100110000101111 %
+0&
+1(
+0)
+b00101010001001100010110100100001 ,
+b10010101101011010001111100001110 -
+b10111111110100110100110000101111 0
+01
+13
+04
+b10111111110100110100110000101111 7
+08
+09
+#30000
+b10101010110101001010000010000001 !
+b00100111101010110100100101011000 "
+b11010010011111111110100111011001 %
+b10101010110101001010000010000001 ,
+b00100111101010110100100101011000 -
+b11010010011111111110100111011001 0
+b11010010011111111110100111011001 7
+#40000
+b01101000111110110001110101100100 !
+b10011100100110010110111101100111 "
+b00000101100101001000110011001011 %
+1&
+0(
+0)
+b01101000111110110001110101100100 ,
+b10011100100110010110111101100111 -
+b00000101100101001000110011001011 0
+11
+03
+04
+b00000101100101001000110011001011 7
+18
+19
+#50000
+b11000011111101000101110111011011 !
+b00110011001001111010111010010111 "
+1#
+b11110111000111000000110001110011 %
+0&
+1(
+0)
+b11000011111101000101110111011011 ,
+b00110011001001111010111010010111 -
+1.
+b11110111000111000000110001110011 0
+01
+13
+04
+b11110111000111000000110001110011 7
+08
+09
+#60000
+b10010111100000001110011111100111 !
+b01100110111111111101100110110011 "
+b11111110100000001100000110011011 %
+b10010111100000001110011111100111 ,
+b01100110111111111101100110110011 -
+b11111110100000001100000110011011 0
+b11111110100000001100000110011011 7
+#70000
+b01101010001110111101000110111100 !
+b11110000111100010001110100000001 "
+0#
+b01011011001011001110111010111101 %
+1&
+0(
+0)
+b01101010001110111101000110111100 ,
+b11110000111100010001110100000001 -
+0.
+b01011011001011001110111010111101 0
+11
+03
+04
+b01011011001011001110111010111101 7
+18
+19
+#80000
+b01101100101000101100111101111001 !
+b10010110100101001111011000001110 "
+1#
+b00000011001101111100010110001000 %
+b01101100101000101100111101111001 ,
+b10010110100101001111011000001110 -
+1.
+b00000011001101111100010110001000 0
+b00000011001101111100010110001000 7
+#90000
+b11011100101110110101100000001010 !
+b10100101110100000011000011010101 "
+b10000010100010111000100011100000 %
+1(
+0)
+b11011100101110110101100000001010 ,
+b10100101110100000011000011010101 -
+b10000010100010111000100011100000 0
+13
+04
+b10000010100010111000100011100000 7
+18
+#100000
+b10000001011000111001001000000001 !
+b10111000110001001001011100000100 "
+b01 $
+b10000000010000001001001000000000 %
+b10000001011000111001001000000001 ,
+b10111000110001001001011100000100 -
+b01 /
+b10000000010000001001001000000000 0
+b10000000010000001001001000000000 7
+#110000
+b01010100100000111101000111101010 !
+b10000001010110001000000111000011 "
+0#
+b00000000000000001000000111000010 %
+1&
+0(
+0)
+b01010100100000111101000111101010 ,
+b10000001010110001000000111000011 -
+0.
+b00000000000000001000000111000010 0
+11
+03
+04
+b00000000000000001000000111000010 7
+18
+19
+#120000
+b01001000001100101110000000110001 !
+b11010111001110001001101101000110 "
+b01000000001100001000000000000000 %
+b01001000001100101110000000110001 ,
+b11010111001110001001101101000110 -
+b01000000001100001000000000000000 0
+b01000000001100001000000000000000 7
+#130000
+b00000101000110101001001001010000 !
+b10101001001010000111010111111111 "
+1#
+b00000001000010000001000001010000 %
+b00000101000110101001001001010000 ,
+b10101001001010000111010111111111 -
+1.
+b00000001000010000001000001010000 0
+b00000001000010000001000001010000 7
+#140000
+b10000010101101111100110111011111 !
+b11101010000010101110111110110100 "
+0#
+b10000010000000101100110110010100 %
+1(
+0)
+b10000010101101111100110111011111 ,
+b11101010000010101110111110110100 -
+0.
+b10000010000000101100110110010100 0
+13
+04
+b10000010000000101100110110010100 7
+18
+#150000
+b00001110001000000111110011001000 !
+b11001010010111011110000101011010 "
+b00001010000000000110000001001000 %
+1&
+0(
+0)
+b00001110001000000111110011001000 ,
+b11001010010111011110000101011010 -
+b00001010000000000110000001001000 0
+11
+03
+04
+b00001010000000000110000001001000 7
+18
+19
+#160000
+b00001111101100010100010110111101 !
+b01001010100011110010010111111010 "
+b00001010100000010000010110111000 %
+0&
+b00001111101100010100010110111101 ,
+b01001010100011110010010111111010 -
+b00001010100000010000010110111000 0
+01
+b00001010100000010000010110111000 7
+08
+09
+#170000
+b11010101100100101010011111100111 !
+b11000111001001100010011010000010 "
+1#
+b11000101000000100010011010000010 %
+1&
+1(
+0)
+b11010101100100101010011111100111 ,
+b11000111001001100010011010000010 -
+1.
+b11000101000000100010011010000010 0
+11
+13
+04
+b11000101000000100010011010000010 7
+18
+19
+#180000
+b00110001000101100110111010000010 !
+b00111100101011001100001101001110 "
+0#
+b00110000000001000100001000000010 %
+0&
+0(
+0)
+b00110001000101100110111010000010 ,
+b00111100101011001100001101001110 -
+0.
+b00110000000001000100001000000010 0
+01
+03
+04
+b00110000000001000100001000000010 7
+08
+09
+#190000
+b11110011010000001010101100110010 !
+b11011100111111111010101000010010 "
+b11010000010000001010101000010010 %
+1&
+1(
+0)
+b11110011010000001010101100110010 ,
+b11011100111111111010101000010010 -
+b11010000010000001010101000010010 0
+11
+13
+04
+b11010000010000001010101000010010 7
+18
+19
+#200000
+b00000001010101011101010100110101 !
+b00000111100000001000100010001011 "
+1#
+b10 $
+b00000111110101011101110110111111 %
+0&
+0(
+0)
+b00000001010101011101010100110101 ,
+b00000111100000001000100010001011 -
+1.
+b10 /
+b00000111110101011101110110111111 0
+01
+03
+04
+b00000111110101011101110110111111 7
+08
+09
+#210000
+b11110111000100010000001110110000 !
+b01001110010010111011100110110110 "
+0#
+b11111111010110111011101110110110 %
+0&
+1(
+0)
+b11110111000100010000001110110000 ,
+b01001110010010111011100110110110 -
+0.
+b11111111010110111011101110110110 0
+01
+13
+04
+b11111111010110111011101110110110 7
+08
+09
+#220000
+b11101001001010000011011011001000 !
+b01111011011111010000101011010000 "
+1#
+b11111011011111010011111011011000 %
+b11101001001010000011011011001000 ,
+b01111011011111010000101011010000 -
+1.
+b11111011011111010011111011011000 0
+b11111011011111010011111011011000 7
+#230000
+b11110010010110101011110010100100 !
+b11010010110111110001100001000010 "
+b11110010110111111011110011100110 %
+1&
+b11110010010110101011110010100100 ,
+b11010010110111110001100001000010 -
+b11110010110111111011110011100110 0
+11
+b11110010110111111011110011100110 7
+18
+19
+#240000
+b00111011111111011111101000111001 !
+b00001010000000111100010100010101 "
+0#
+b00111011111111111111111100111101 %
+0&
+0(
+0)
+b00111011111111011111101000111001 ,
+b00001010000000111100010100010101 -
+0.
+b00111011111111111111111100111101 0
+01
+03
+04
+b00111011111111111111111100111101 7
+08
+09
+#250000
+b01000101011000110101011000110111 !
+b11100000011000010100101100011010 "
+1#
+b11100101011000110101111100111111 %
+0&
+1(
+0)
+b01000101011000110101011000110111 ,
+b11100000011000010100101100011010 -
+1.
+b11100101011000110101111100111111 0
+01
+13
+04
+b11100101011000110101111100111111 7
+08
+09
+#260000
+b11111010000011100001100010000011 !
+b10110000101110001000111010000100 "
+b11111010101111101001111010000111 %
+1&
+b11111010000011100001100010000011 ,
+b10110000101110001000111010000100 -
+b11111010101111101001111010000111 0
+11
+b11111010101111101001111010000111 7
+18
+19
+#270000
+b10011011101010101001101110101001 !
+b11001100000101000100111000111010 "
+0#
+b11011111101111101101111110111011 %
+b10011011101010101001101110101001 ,
+b11001100000101000100111000111010 -
+0.
+b11011111101111101101111110111011 0
+b11011111101111101101111110111011 7
+#280000
+b00111101101011010111001111010010 !
+b11010100001001011011000011110110 "
+b11111101101011011111001111110110 %
+0&
+0)
+b00111101101011010111001111010010 ,
+b11010100001001011011000011110110 -
+b11111101101011011111001111110110 0
+01
+04
+b11111101101011011111001111110110 7
+08
+09
+#290000
+b10010000100001101010110111110001 !
+b10000111010110111010100010101111 "
+b10010111110111111010110111111111 %
+1&
+b10010000100001101010110111110001 ,
+b10000111010110111010100010101111 -
+b10010111110111111010110111111111 0
+11
+b10010111110111111010110111111111 7
+18
+19
+#300000
+b00010001111110001001010100010000 !
+b00101110110100011000001110111101 "
+b11 $
+b00111111001010010001011010101101 %
+0&
+0(
+0)
+b00010001111110001001010100010000 ,
+b00101110110100011000001110111101 -
+b11 /
+b00111111001010010001011010101101 0
+01
+03
+04
+b00111111001010010001011010101101 7
+08
+09
+#310000
+b01010100110011111000010111001000 !
+b10010010110100111100110011110001 "
+b11000110000111000100100100111001 %
+0&
+1(
+0)
+b01010100110011111000010111001000 ,
+b10010010110100111100110011110001 -
+b11000110000111000100100100111001 0
+01
+13
+04
+b11000110000111000100100100111001 7
+08
+09
+#320000
+b11110110010100110101011011110000 !
+b11101111011001001010001000111111 "
+1#
+b00011001001101111111010011001111 %
+1&
+0(
+1)
+b11110110010100110101011011110000 ,
+b11101111011001001010001000111111 -
+1.
+b00011001001101111111010011001111 0
+11
+03
+14
+b00011001001101111111010011001111 7
+08
+19
+#330000
+b00000011000011000111001010010111 !
+b01001110101011111110100111000000 "
+0#
+b01001101101000111001101101010111 %
+0&
+0)
+b00000011000011000111001010010111 ,
+b01001110101011111110100111000000 -
+0.
+b01001101101000111001101101010111 0
+01
+04
+b01001101101000111001101101010111 7
+09
+#340000
+b11011100011001100101111001001000 !
+b00000101101100000010011011011101 "
+b11011001110101100111100010010101 %
+0&
+1(
+0)
+b11011100011001100101111001001000 ,
+b00000101101100000010011011011101 -
+b11011001110101100111100010010101 0
+01
+13
+04
+b11011001110101100111100010010101 7
+08
+09
+#350000
+b11010110110101001111010101001111 !
+b10000110011011101100100100111101 "
+b01010000101110100011110001110010 %
+1&
+0(
+1)
+b11010110110101001111010101001111 ,
+b10000110011011101100100100111101 -
+b01010000101110100011110001110010 0
+11
+03
+14
+b01010000101110100011110001110010 7
+08
+19
+#360000
+b10110111010100101001111011000001 !
+b10000101101100001001000000100011 "
+b00110010111000100000111011100010 %
+b10110111010100101001111011000001 ,
+b10000101101100001001000000100011 -
+b00110010111000100000111011100010 0
+b00110010111000100000111011100010 7
+#370000
+b00110001010010010110001110110110 !
+b01000011001001101000001110011000 "
+1#
+b01110010011011111110000000101110 %
+0&
+0)
+b00110001010010010110001110110110 ,
+b01000011001001101000001110011000 -
+1.
+b01110010011011111110000000101110 0
+01
+04
+b01110010011011111110000000101110 7
+09
+#380000
+b10001111100001001101011000011111 !
+b01000111101001100010010001001111 "
+0#
+b11001000001000101111001001010000 %
+0&
+1(
+0)
+b10001111100001001101011000011111 ,
+b01000111101001100010010001001111 -
+0.
+b11001000001000101111001001010000 0
+01
+13
+04
+b11001000001000101111001001010000 7
+08
+09
+#390000
+b11110011101100000001000111111100 !
+b00111110010100111100011100011010 "
+1#
+b11001101111000111101011011100110 %
+b11110011101100000001000111111100 ,
+b00111110010100111100011100011010 -
+1.
+b11001101111000111101011011100110 0
+b11001101111000111101011011100110 7
+#400000
+b10100111111110011010010110101000 !
+b10100010000110000000111110010011 "
+b00 $
+b01001010000100011011010100111100 %
+1&
+0(
+1)
+b10100111111110011010010110101000 ,
+b10100010000110000000111110010011 -
+b00 /
+b01001010000100011011010100111100 0
+11
+03
+14
+b01001010000100011011010100111100 7
+08
+19
+#410000
+b11100100011000101011010001111100 !
+b11011110101101100011010001000001 "
+b11000011000110001110100010111110 %
+1(
+0)
+b11100100011000101011010001111100 ,
+b11011110101101100011010001000001 -
+b11000011000110001110100010111110 0
+13
+04
+b11000011000110001110100010111110 7
+18
+#420000
+b01101000110100011000000100010100 !
+b11001011000100111110100000100010 "
+b00110011111001010110100100110111 %
+1&
+0(
+0)
+b01101000110100011000000100010100 ,
+b11001011000100111110100000100010 -
+b00110011111001010110100100110111 0
+11
+03
+04
+b00110011111001010110100100110111 7
+18
+19
+#430000
+b00110100100011101101100001000110 !
+b00011110111111111111010100100000 "
+b01010011100011101100110101100111 %
+0&
+b00110100100011101101100001000110 ,
+b00011110111111111111010100100000 -
+b01010011100011101100110101100111 0
+01
+b01010011100011101100110101100111 7
+08
+09
+#440000
+b10100001101100001000110110101011 !
+b10001001100111100111110111111000 "
+b00101011010011110000101110100100 %
+1&
+1)
+b10100001101100001000110110101011 ,
+b10001001100111100111110111111000 -
+b00101011010011110000101110100100 0
+11
+14
+b00101011010011110000101110100100 7
+19
+#450000
+b11010011111011100100000110000110 !
+b01001100011010101110101111000011 "
+0#
+b00100000010110010010110101001001 %
+1&
+0)
+b11010011111011100100000110000110 ,
+b01001100011010101110101111000011 -
+0.
+b00100000010110010010110101001001 0
+11
+04
+b00100000010110010010110101001001 7
+18
+19
+#460000
+b11100101111110110100101011010000 !
+b11000011011010110110101101100111 "
+b10101001011001101011011000110111 %
+1(
+0)
+b11100101111110110100101011010000 ,
+b11000011011010110110101101100111 -
+b10101001011001101011011000110111 0
+13
+04
+b10101001011001101011011000110111 7
+18
+#470000
+b00100101100110110010010001001111 !
+b10000101101001111010000111011111 "
+b10101011010000101100011000101110 %
+0&
+0)
+b00100101100110110010010001001111 ,
+b10000101101001111010000111011111 -
+b10101011010000101100011000101110 0
+01
+04
+b10101011010000101100011000101110 7
+08
+09
+#480000
+b11101110010001000111101010100000 !
+b01010001011001100101001010101101 "
+b00111111101010101100110101001101 %
+1&
+0(
+0)
+b11101110010001000111101010100000 ,
+b01010001011001100101001010101101 -
+b00111111101010101100110101001101 0
+11
+03
+04
+b00111111101010101100110101001101 7
+18
+19
+#490000
+b10110000110100011100010101001000 !
+b01011000011000110011101001011110 "
+b00001001001101001111111110100110 %
+b10110000110100011100010101001000 ,
+b01011000011000110011101001011110 -
+b00001001001101001111111110100110 0
+b00001001001101001111111110100110 7
+#500000
+b01 $
+b00010000010000010000000001001000 %
+b01 /
+b00010000010000010000000001001000 0
+b00010000010000010000000001001000 7

tests/vcd-files/model-sim/clkdiv2n_tb.vcd

@@ -0,0 +1,292 @@
+$date
+	Sat Dec 26 15:33:14 2020
+$end
+$version
+	ModelSim Version 10.5b
+$end
+$timescale
+	1ns
+$end
+
+$scope module clkdiv2n_tb $end
+$var reg 1 ! clk $end
+$var reg 1 " reset $end
+$var wire 1 # clk_out $end
+
+$scope module t1 $end
+$var parameter 32 $ WIDTH $end
+$var parameter 32 % N $end
+$var wire 1 & clk $end
+$var wire 1 ' reset $end
+$var wire 1 # clk_out $end
+$var reg 3 ( r_reg [2:0] $end
+$var wire 1 ) r_nxt [2] $end
+$var wire 1 * r_nxt [1] $end
+$var wire 1 + r_nxt [0] $end
+$var reg 1 , clk_track $end
+$upscope $end
+$upscope $end
+$enddefinitions $end
+#0
+$dumpvars
+0!
+x"
+bx (
+x,
+b11 $
+b110 %
+x#
+x+
+x*
+x)
+x'
+0&
+$end
+#5
+1"
+1'
+b0 (
+0,
+1+
+0*
+0)
+0#
+#10
+1!
+1&
+#15
+0"
+0'
+#20
+0!
+0&
+#30
+1!
+1&
+b1 (
+0+
+1*
+#40
+0!
+0&
+#50
+1!
+1&
+b10 (
+1+
+#60
+0!
+0&
+#70
+1!
+1&
+b11 (
+0+
+0*
+1)
+#80
+0!
+0&
+#90
+1!
+1&
+b100 (
+1+
+#100
+0!
+0&
+#110
+1!
+1&
+b101 (
+0+
+1*
+#120
+0!
+0&
+#130
+1!
+1&
+b0 (
+1,
+1+
+0*
+0)
+1#
+#140
+0!
+0&
+#150
+1!
+1&
+b1 (
+0+
+1*
+#160
+0!
+0&
+#170
+1!
+1&
+b10 (
+1+
+#180
+0!
+0&
+#190
+1!
+1&
+b11 (
+0+
+0*
+1)
+#200
+0!
+0&
+#210
+1!
+1&
+b100 (
+1+
+#220
+0!
+0&
+#230
+1!
+1&
+b101 (
+0+
+1*
+#240
+0!
+0&
+#250
+1!
+1&
+b0 (
+0,
+1+
+0*
+0)
+0#
+#260
+0!
+0&
+#270
+1!
+1&
+b1 (
+0+
+1*
+#280
+0!
+0&
+#290
+1!
+1&
+b10 (
+1+
+#300
+0!
+0&
+#310
+1!
+1&
+b11 (
+0+
+0*
+1)
+#320
+0!
+0&
+#330
+1!
+1&
+b100 (
+1+
+#340
+0!
+0&
+#350
+1!
+1&
+b101 (
+0+
+1*
+#360
+0!
+0&
+#370
+1!
+1&
+b0 (
+1,
+1+
+0*
+0)
+1#
+#380
+0!
+0&
+#390
+1!
+1&
+b1 (
+0+
+1*
+#400
+0!
+0&
+#410
+1!
+1&
+b10 (
+1+
+#420
+0!
+0&
+#430
+1!
+1&
+b11 (
+0+
+0*
+1)
+#440
+0!
+0&
+#450
+1!
+1&
+b100 (
+1+
+#460
+0!
+0&
+#470
+1!
+1&
+b101 (
+0+
+1*
+#480
+0!
+0&
+#490
+1!
+1&
+b0 (
+0,
+1+
+0*
+0)
+0#
+#500
+0!
+0&
+#510
+1!
+1&
+b1 (
+0+
+1*

tests/vcd-files/quartus/wave_registradores.vcd

@@ -0,0 +1,151 @@
+$date
+     Dec 16, 2020       19:50:58
+$end
+
+$version
+ SystemC 2.3.3-Accellera --- Nov 12 2020 19:12:35
+$end
+
+$timescale
+     1 ps
+$end
+
+$scope module SystemC $end
+$var wire    1  aaaaa  clock       $end
+$var wire    1  aaaab  mi_RegWrite       $end
+$var wire    5  aaaac  i_ReadRegister1 [4:0]  $end
+$var wire    5  aaaad  i_ReadRegister2 [4:0]  $end
+$var wire    5  aaaae  i_WriteRegister [4:0]  $end
+$var wire   32  aaaaf  i_WriteData [31:0]  $end
+$var wire   32  aaaag  o_ReadData1 [31:0]  $end
+$var wire   32  aaaah  o_ReadData2 [31:0]  $end
+$upscope $end
+$enddefinitions  $end
+
+$comment
+All initial values are dumped below at time 0 sec = 0 timescale units.
+$end
+
+$dumpvars
+1aaaaa
+1aaaab
+b0 aaaac
+b0 aaaad
+b1 aaaae
+b1 aaaaf
+b0 aaaag
+b0 aaaah
+$end
+
+#25000
+0aaaaa
+
+#50000
+1aaaaa
+b10 aaaae
+b10 aaaaf
+
+#75000
+0aaaaa
+
+#100000
+1aaaaa
+b101 aaaae
+b101 aaaaf
+
+#125000
+0aaaaa
+
+#150000
+1aaaaa
+0aaaab
+b1 aaaac
+b10 aaaad
+b0 aaaae
+b0 aaaaf
+
+#175000
+0aaaaa
+
+#200000
+1aaaaa
+b10 aaaac
+b101 aaaad
+b1 aaaag
+b10 aaaah
+
+#225000
+0aaaaa
+
+#250000
+1aaaaa
+1aaaab
+b0 aaaac
+b0 aaaad
+b1 aaaae
+b1 aaaaf
+b10 aaaag
+b101 aaaah
+
+#275000
+0aaaaa
+
+#300000
+1aaaaa
+b10 aaaae
+b10 aaaaf
+
+#325000
+0aaaaa
+
+#350000
+1aaaaa
+b101 aaaae
+b101 aaaaf
+
+#375000
+0aaaaa
+
+#400000
+1aaaaa
+0aaaab
+b1 aaaac
+b10 aaaad
+b0 aaaae
+b0 aaaaf
+
+#425000
+0aaaaa
+
+#450000
+1aaaaa
+b10 aaaac
+b101 aaaad
+b1 aaaag
+b10 aaaah
+
+#475000
+0aaaaa
+
+#500000
+1aaaaa
+1aaaab
+b0 aaaac
+b0 aaaad
+b1 aaaae
+b1 aaaaf
+b10 aaaag
+b101 aaaah
+
+#525000
+0aaaaa
+
+#550000
+1aaaaa
+b10 aaaae
+b10 aaaaf
+
+#575000
+0aaaaa
+
+#600000

tests/vcd-files/questa-sim/test.vcd

@@ -0,0 +1,478 @@
+$date
+	Wed Jul  7 08:30:24 2021
+$end
+$version
+	QuestaSim Version 2020.1_1
+$end
+$timescale
+	1ns
+$end
+
+$scope module test $end
+$var reg 1 ! clk $end
+$var wire 1 " count [2] $end
+$var wire 1 # count [1] $end
+$var wire 1 $ count [0] $end
+
+$scope module dut $end
+$var reg 3 % count [2:0] $end
+$var wire 1 & clk $end
+$var reg 5 ' Dout [4:0] $end
+$var reg 5 ( Din [4:0] $end
+
+$scope begin init[4] $end
+$var parameter 32 ) i $end
+
+$scope module inst $end
+$var reg 1 * q $end
+$var wire 1 + din $end
+$var wire 1 & clk $end
+$upscope $end
+$upscope $end
+
+$scope begin init[3] $end
+$var parameter 32 , i $end
+
+$scope module inst $end
+$var reg 1 - q $end
+$var wire 1 . din $end
+$var wire 1 & clk $end
+$upscope $end
+$upscope $end
+
+$scope begin init[2] $end
+$var parameter 32 / i $end
+
+$scope module inst $end
+$var reg 1 0 q $end
+$var wire 1 1 din $end
+$var wire 1 & clk $end
+$upscope $end
+$upscope $end
+
+$scope begin init[1] $end
+$var parameter 32 2 i $end
+
+$scope module inst $end
+$var reg 1 3 q $end
+$var wire 1 4 din $end
+$var wire 1 & clk $end
+$upscope $end
+$upscope $end
+
+$scope begin init[0] $end
+$var parameter 32 5 i $end
+
+$scope module inst $end
+$var reg 1 6 q $end
+$var wire 1 7 din $end
+$var wire 1 & clk $end
+$upscope $end
+$upscope $end
+$upscope $end
+$upscope $end
+$enddefinitions $end
+#0
+$dumpvars
+0!
+bx %
+bx '
+bx (
+x6
+x3
+x0
+x-
+x*
+b0 5
+b1 2
+b10 /
+b11 ,
+b100 )
+x$
+x#
+x"
+0&
+x7
+x4
+x1
+x.
+x+
+$end
+#5
+1!
+1&
+#6
+b10 (
+0+
+0.
+01
+14
+07
+#10
+0!
+0&
+#15
+1!
+1&
+06
+13
+00
+0-
+0*
+b0xxxx '
+b0xxx '
+b0xx '
+b1x '
+b10 '
+b10 %
+0$
+1#
+0"
+#16
+b1 (
+04
+17
+#20
+0!
+0&
+#25
+1!
+1&
+03
+16
+b11 '
+b1 '
+b1 %
+1$
+0#
+#26
+b1010 (
+1.
+14
+07
+#30
+0!
+0&
+#35
+1!
+1&
+1-
+06
+13
+b11 '
+b10 '
+b1010 '
+b10 %
+0$
+1#
+#36
+b1011 (
+17
+#40
+0!
+0&
+#45
+1!
+1&
+16
+b1011 '
+b11 %
+1$
+#46
+b10010 (
+1+
+0.
+07
+#50
+0!
+0&
+#55
+1!
+1&
+0-
+1*
+06
+b1010 '
+b11010 '
+b10010 '
+b10 %
+0$
+#56
+b10100 (
+11
+04
+#60
+0!
+0&
+#65
+1!
+1&
+03
+10
+b10110 '
+b10100 '
+b100 %
+0#
+1"
+#66
+b11010 (
+1.
+01
+14
+#70
+0!
+0&
+#75
+1!
+1&
+1-
+00
+13
+b10110 '
+b10010 '
+b11010 '
+b10 %
+1#
+0"
+#76
+b11101 (
+11
+04
+17
+#80
+0!
+0&
+#85
+1!
+1&
+16
+03
+10
+b11110 '
+b11100 '
+b11101 '
+b101 %
+1$
+0#
+1"
+#86
+b10 (
+0+
+0.
+01
+14
+07
+#90
+0!
+0&
+#95
+1!
+1&
+0-
+0*
+00
+13
+06
+b11100 '
+b11110 '
+b11010 '
+b1010 '
+b10 '
+b10 %
+0$
+1#
+0"
+#96
+b1 (
+04
+17
+#100
+0!
+0&
+#105
+1!
+1&
+16
+03
+b0 '
+b1 '
+b1 %
+1$
+0#
+#106
+b1010 (
+1.
+14
+07
+#110
+0!
+0&
+#115
+1!
+1&
+1-
+13
+06
+b0 '
+b10 '
+b1010 '
+b10 %
+0$
+1#
+#116
+b1011 (
+17
+#120
+0!
+0&
+#125
+1!
+1&
+16
+b1011 '
+b11 %
+1$
+#126
+b10010 (
+1+
+0.
+07
+#130
+0!
+0&
+#135
+1!
+1&
+0-
+1*
+06
+b1010 '
+b11010 '
+b10010 '
+b10 %
+0$
+#136
+b10100 (
+11
+04
+#140
+0!
+0&
+#145
+1!
+1&
+03
+10
+b10110 '
+b10100 '
+b100 %
+0#
+1"
+#146
+b11010 (
+1.
+01
+14
+#150
+0!
+0&
+#155
+1!
+1&
+1-
+00
+13
+b10110 '
+b10010 '
+b11010 '
+b10 %
+1#
+0"
+#156
+b11101 (
+11
+04
+17
+#160
+0!
+0&
+#165
+1!
+1&
+16
+03
+10
+b11110 '
+b11100 '
+b11101 '
+b101 %
+1$
+0#
+1"
+#166
+b10 (
+0+
+0.
+01
+14
+07
+#170
+0!
+0&
+#175
+1!
+1&
+0-
+0*
+00
+13
+06
+b11100 '
+b11110 '
+b11010 '
+b1010 '
+b10 '
+b10 %
+0$
+1#
+0"
+#176
+b1 (
+04
+17
+#180
+0!
+0&
+#185
+1!
+1&
+16
+03
+b0 '
+b1 '
+b1 %
+1$
+0#
+#186
+b1010 (
+1.
+14
+07
+#190
+0!
+0&
+#195
+1!
+1&
+1-
+13
+06
+b0 '
+b10 '
+b1010 '
+b10 %
+0$
+1#
+#196
+b1011 (
+17

tests/vcd-files/riviera-pro/dump.vcd

@@ -0,0 +1,936 @@
+$date
+Mon Jul 19 14:17:09 2021
+$end
+$version
+Riviera-PRO Version 2020.04.130.7729
+$end
+$timescale
+1 ps
+$end
+
+$scope module tb_tic_tac_toe $end
+$var wire 2 ! pos_led1 [1:0] $end
+$var wire 2 " pos_led2 [1:0] $end
+$var wire 2 # pos_led3 [1:0] $end
+$var wire 2 $ pos_led4 [1:0] $end
+$var wire 2 % pos_led5 [1:0] $end
+$var wire 2 & pos_led6 [1:0] $end
+$var wire 2 ' pos_led7 [1:0] $end
+$var wire 2 ( pos_led8 [1:0] $end
+$var wire 2 ) pos_led9 [1:0] $end
+$var wire 2 * who [1:0] $end
+$var reg 1 + clock $end
+$var reg 1 , reset $end
+$var reg 1 - play $end
+$var reg 1 . pc $end
+$var reg 4 / computer_position [3:0] $end
+$var reg 4 0 player_position [3:0] $end
+
+$scope module uut $end
+$var wire 1 1 clock $end
+$var wire 1 2 reset $end
+$var wire 1 3 play $end
+$var wire 1 4 pc $end
+$var wire 4 5 computer_position [3:0] $end
+$var wire 4 6 player_position [3:0] $end
+$var wire 2 ! pos1 [1:0] $end
+$var wire 2 " pos2 [1:0] $end
+$var wire 2 # pos3 [1:0] $end
+$var wire 2 $ pos4 [1:0] $end
+$var wire 2 % pos5 [1:0] $end
+$var wire 2 & pos6 [1:0] $end
+$var wire 2 ' pos7 [1:0] $end
+$var wire 2 ( pos8 [1:0] $end
+$var wire 2 ) pos9 [1:0] $end
+$var wire 2 * who [1:0] $end
+$var wire 1 7 PC_en [15] $end
+$var wire 1 8 PC_en [14] $end
+$var wire 1 9 PC_en [13] $end
+$var wire 1 : PC_en [12] $end
+$var wire 1 ; PC_en [11] $end
+$var wire 1 < PC_en [10] $end
+$var wire 1 = PC_en [9] $end
+$var wire 1 > PC_en [8] $end
+$var wire 1 ? PC_en [7] $end
+$var wire 1 @ PC_en [6] $end
+$var wire 1 A PC_en [5] $end
+$var wire 1 B PC_en [4] $end
+$var wire 1 C PC_en [3] $end
+$var wire 1 D PC_en [2] $end
+$var wire 1 E PC_en [1] $end
+$var wire 1 F PC_en [0] $end
+$var wire 1 G PL_en [15] $end
+$var wire 1 H PL_en [14] $end
+$var wire 1 I PL_en [13] $end
+$var wire 1 J PL_en [12] $end
+$var wire 1 K PL_en [11] $end
+$var wire 1 L PL_en [10] $end
+$var wire 1 M PL_en [9] $end
+$var wire 1 N PL_en [8] $end
+$var wire 1 O PL_en [7] $end
+$var wire 1 P PL_en [6] $end
+$var wire 1 Q PL_en [5] $end
+$var wire 1 R PL_en [4] $end
+$var wire 1 S PL_en [3] $end
+$var wire 1 T PL_en [2] $end
+$var wire 1 U PL_en [1] $end
+$var wire 1 V PL_en [0] $end
+$var wire 1 W illegal_move $end
+$var wire 1 X win $end
+$var wire 1 Y computer_play $end
+$var wire 1 Z player_play $end
+$var wire 1 [ no_space $end
+
+$scope module position_reg_unit $end
+$var wire 1 1 clock $end
+$var wire 1 2 reset $end
+$var wire 1 W illegal_move $end
+$var wire 1 > PC_en [8] $end
+$var wire 1 ? PC_en [7] $end
+$var wire 1 @ PC_en [6] $end
+$var wire 1 A PC_en [5] $end
+$var wire 1 B PC_en [4] $end
+$var wire 1 C PC_en [3] $end
+$var wire 1 D PC_en [2] $end
+$var wire 1 E PC_en [1] $end
+$var wire 1 F PC_en [0] $end
+$var wire 1 N PL_en [8] $end
+$var wire 1 O PL_en [7] $end
+$var wire 1 P PL_en [6] $end
+$var wire 1 Q PL_en [5] $end
+$var wire 1 R PL_en [4] $end
+$var wire 1 S PL_en [3] $end
+$var wire 1 T PL_en [2] $end
+$var wire 1 U PL_en [1] $end
+$var wire 1 V PL_en [0] $end
+$var reg 2 \ pos1 [1:0] $end
+$var reg 2 ] pos2 [1:0] $end
+$var reg 2 ^ pos3 [1:0] $end
+$var reg 2 _ pos4 [1:0] $end
+$var reg 2 ` pos5 [1:0] $end
+$var reg 2 a pos6 [1:0] $end
+$var reg 2 b pos7 [1:0] $end
+$var reg 2 c pos8 [1:0] $end
+$var reg 2 d pos9 [1:0] $end
+$upscope $end
+
+
+$scope module win_detect_unit $end
+$var wire 2 ! pos1 [1:0] $end
+$var wire 2 " pos2 [1:0] $end
+$var wire 2 # pos3 [1:0] $end
+$var wire 2 $ pos4 [1:0] $end
+$var wire 2 % pos5 [1:0] $end
+$var wire 2 & pos6 [1:0] $end
+$var wire 2 ' pos7 [1:0] $end
+$var wire 2 ( pos8 [1:0] $end
+$var wire 2 ) pos9 [1:0] $end
+$var wire 1 X winner $end
+$var wire 2 * who [1:0] $end
+$var wire 1 e win1 $end
+$var wire 1 f win2 $end
+$var wire 1 g win3 $end
+$var wire 1 h win4 $end
+$var wire 1 i win5 $end
+$var wire 1 j win6 $end
+$var wire 1 k win7 $end
+$var wire 1 l win8 $end
+$var wire 2 m who1 [1:0] $end
+$var wire 2 n who2 [1:0] $end
+$var wire 2 o who3 [1:0] $end
+$var wire 2 p who4 [1:0] $end
+$var wire 2 q who5 [1:0] $end
+$var wire 2 r who6 [1:0] $end
+$var wire 2 s who7 [1:0] $end
+$var wire 2 t who8 [1:0] $end
+
+$scope module u1 $end
+$var wire 2 ! pos0 [1:0] $end
+$var wire 2 " pos1 [1:0] $end
+$var wire 2 # pos2 [1:0] $end
+$var wire 1 e winner $end
+$var wire 2 m who [1:0] $end
+$var wire 2 u temp0 [1:0] $end
+$var wire 2 v temp1 [1:0] $end
+$var wire 2 w temp2 [1:0] $end
+$var wire 1 x temp3 $end
+$upscope $end
+
+
+$scope module u2 $end
+$var wire 2 $ pos0 [1:0] $end
+$var wire 2 % pos1 [1:0] $end
+$var wire 2 & pos2 [1:0] $end
+$var wire 1 f winner $end
+$var wire 2 n who [1:0] $end
+$var wire 2 y temp0 [1:0] $end
+$var wire 2 z temp1 [1:0] $end
+$var wire 2 { temp2 [1:0] $end
+$var wire 1 | temp3 $end
+$upscope $end
+
+
+$scope module u3 $end
+$var wire 2 ' pos0 [1:0] $end
+$var wire 2 ( pos1 [1:0] $end
+$var wire 2 ) pos2 [1:0] $end
+$var wire 1 g winner $end
+$var wire 2 o who [1:0] $end
+$var wire 2 } temp0 [1:0] $end
+$var wire 2 ~ temp1 [1:0] $end
+$var wire 2 !! temp2 [1:0] $end
+$var wire 1 "! temp3 $end
+$upscope $end
+
+
+$scope module u4 $end
+$var wire 2 ! pos0 [1:0] $end
+$var wire 2 $ pos1 [1:0] $end
+$var wire 2 ' pos2 [1:0] $end
+$var wire 1 h winner $end
+$var wire 2 p who [1:0] $end
+$var wire 2 #! temp0 [1:0] $end
+$var wire 2 $! temp1 [1:0] $end
+$var wire 2 %! temp2 [1:0] $end
+$var wire 1 &! temp3 $end
+$upscope $end
+
+
+$scope module u5 $end
+$var wire 2 " pos0 [1:0] $end
+$var wire 2 % pos1 [1:0] $end
+$var wire 2 ( pos2 [1:0] $end
+$var wire 1 i winner $end
+$var wire 2 q who [1:0] $end
+$var wire 2 '! temp0 [1:0] $end
+$var wire 2 (! temp1 [1:0] $end
+$var wire 2 )! temp2 [1:0] $end
+$var wire 1 *! temp3 $end
+$upscope $end
+
+
+$scope module u6 $end
+$var wire 2 # pos0 [1:0] $end
+$var wire 2 & pos1 [1:0] $end
+$var wire 2 ) pos2 [1:0] $end
+$var wire 1 j winner $end
+$var wire 2 r who [1:0] $end
+$var wire 2 +! temp0 [1:0] $end
+$var wire 2 ,! temp1 [1:0] $end
+$var wire 2 -! temp2 [1:0] $end
+$var wire 1 .! temp3 $end
+$upscope $end
+
+
+$scope module u7 $end
+$var wire 2 ! pos0 [1:0] $end
+$var wire 2 % pos1 [1:0] $end
+$var wire 2 ) pos2 [1:0] $end
+$var wire 1 k winner $end
+$var wire 2 s who [1:0] $end
+$var wire 2 /! temp0 [1:0] $end
+$var wire 2 0! temp1 [1:0] $end
+$var wire 2 1! temp2 [1:0] $end
+$var wire 1 2! temp3 $end
+$upscope $end
+
+
+$scope module u8 $end
+$var wire 2 # pos0 [1:0] $end
+$var wire 2 % pos1 [1:0] $end
+$var wire 2 & pos2 [1:0] $end
+$var wire 1 l winner $end
+$var wire 2 t who [1:0] $end
+$var wire 2 3! temp0 [1:0] $end
+$var wire 2 4! temp1 [1:0] $end
+$var wire 2 5! temp2 [1:0] $end
+$var wire 1 6! temp3 $end
+$upscope $end
+
+$upscope $end
+
+
+$scope module pd1 $end
+$var wire 4 5 in [3:0] $end
+$var wire 1 Y enable $end
+$var wire 1 7 out_en [15] $end
+$var wire 1 8 out_en [14] $end
+$var wire 1 9 out_en [13] $end
+$var wire 1 : out_en [12] $end
+$var wire 1 ; out_en [11] $end
+$var wire 1 < out_en [10] $end
+$var wire 1 = out_en [9] $end
+$var wire 1 > out_en [8] $end
+$var wire 1 ? out_en [7] $end
+$var wire 1 @ out_en [6] $end
+$var wire 1 A out_en [5] $end
+$var wire 1 B out_en [4] $end
+$var wire 1 C out_en [3] $end
+$var wire 1 D out_en [2] $end
+$var wire 1 E out_en [1] $end
+$var wire 1 F out_en [0] $end
+$var reg 16 7! temp1 [15:0] $end
+$upscope $end
+
+
+$scope module pd2 $end
+$var wire 4 6 in [3:0] $end
+$var wire 1 Z enable $end
+$var wire 1 G out_en [15] $end
+$var wire 1 H out_en [14] $end
+$var wire 1 I out_en [13] $end
+$var wire 1 J out_en [12] $end
+$var wire 1 K out_en [11] $end
+$var wire 1 L out_en [10] $end
+$var wire 1 M out_en [9] $end
+$var wire 1 N out_en [8] $end
+$var wire 1 O out_en [7] $end
+$var wire 1 P out_en [6] $end
+$var wire 1 Q out_en [5] $end
+$var wire 1 R out_en [4] $end
+$var wire 1 S out_en [3] $end
+$var wire 1 T out_en [2] $end
+$var wire 1 U out_en [1] $end
+$var wire 1 V out_en [0] $end
+$var reg 16 8! temp1 [15:0] $end
+$upscope $end
+
+
+$scope module imd_unit $end
+$var wire 2 ! pos1 [1:0] $end
+$var wire 2 " pos2 [1:0] $end
+$var wire 2 # pos3 [1:0] $end
+$var wire 2 $ pos4 [1:0] $end
+$var wire 2 % pos5 [1:0] $end
+$var wire 2 & pos6 [1:0] $end
+$var wire 2 ' pos7 [1:0] $end
+$var wire 2 ( pos8 [1:0] $end
+$var wire 2 ) pos9 [1:0] $end
+$var wire 1 > PC_en [8] $end
+$var wire 1 ? PC_en [7] $end
+$var wire 1 @ PC_en [6] $end
+$var wire 1 A PC_en [5] $end
+$var wire 1 B PC_en [4] $end
+$var wire 1 C PC_en [3] $end
+$var wire 1 D PC_en [2] $end
+$var wire 1 E PC_en [1] $end
+$var wire 1 F PC_en [0] $end
+$var wire 1 N PL_en [8] $end
+$var wire 1 O PL_en [7] $end
+$var wire 1 P PL_en [6] $end
+$var wire 1 Q PL_en [5] $end
+$var wire 1 R PL_en [4] $end
+$var wire 1 S PL_en [3] $end
+$var wire 1 T PL_en [2] $end
+$var wire 1 U PL_en [1] $end
+$var wire 1 V PL_en [0] $end
+$var wire 1 W illegal_move $end
+$var wire 1 9! temp1 $end
+$var wire 1 :! temp2 $end
+$var wire 1 ;! temp3 $end
+$var wire 1 <! temp4 $end
+$var wire 1 =! temp5 $end
+$var wire 1 >! temp6 $end
+$var wire 1 ?! temp7 $end
+$var wire 1 @! temp8 $end
+$var wire 1 A! temp9 $end
+$var wire 1 B! temp11 $end
+$var wire 1 C! temp12 $end
+$var wire 1 D! temp13 $end
+$var wire 1 E! temp14 $end
+$var wire 1 F! temp15 $end
+$var wire 1 G! temp16 $end
+$var wire 1 H! temp17 $end
+$var wire 1 I! temp18 $end
+$var wire 1 J! temp19 $end
+$var wire 1 K! temp21 $end
+$var wire 1 L! temp22 $end
+$upscope $end
+
+
+$scope module nsd_unit $end
+$var wire 2 ! pos1 [1:0] $end
+$var wire 2 " pos2 [1:0] $end
+$var wire 2 # pos3 [1:0] $end
+$var wire 2 $ pos4 [1:0] $end
+$var wire 2 % pos5 [1:0] $end
+$var wire 2 & pos6 [1:0] $end
+$var wire 2 ' pos7 [1:0] $end
+$var wire 2 ( pos8 [1:0] $end
+$var wire 2 ) pos9 [1:0] $end
+$var wire 1 [ no_space $end
+$var wire 1 M! temp1 $end
+$var wire 1 N! temp2 $end
+$var wire 1 O! temp3 $end
+$var wire 1 P! temp4 $end
+$var wire 1 Q! temp5 $end
+$var wire 1 R! temp6 $end
+$var wire 1 S! temp7 $end
+$var wire 1 T! temp8 $end
+$var wire 1 U! temp9 $end
+$upscope $end
+
+
+$scope module tic_tac_toe_controller $end
+$var wire 1 1 clock $end
+$var wire 1 2 reset $end
+$var wire 1 3 play $end
+$var wire 1 4 pc $end
+$var wire 1 W illegal_move $end
+$var wire 1 [ no_space $end
+$var wire 1 X win $end
+$var reg 1 V! computer_play $end
+$var reg 1 W! player_play $end
+$var reg 2 X! current_state [1:0] $end
+$var reg 2 Y! next_state [1:0] $end
+$var parameter 2 Z! IDLE [1:0] $end
+$var parameter 2 [! PLAYER [1:0] $end
+$var parameter 2 \! COMPUTER [1:0] $end
+$var parameter 2 ]! GAME_DONE [1:0] $end
+$upscope $end
+
+$upscope $end
+
+$upscope $end
+
+$enddefinitions $end
+$dumpvars
+b0 !
+b0 "
+b0 #
+b0 $
+b0 %
+b0 &
+b0 '
+b0 (
+b0 )
+b0 *
+0+
+1,
+0-
+0.
+b0 /
+b0 0
+01
+12
+03
+04
+b0 5
+b0 6
+07
+08
+09
+0:
+0;
+0<
+0=
+0>
+0?
+0@
+0A
+0B
+0C
+0D
+0E
+0F
+0G
+0H
+0I
+0J
+0K
+0L
+0M
+0N
+0O
+0P
+0Q
+0R
+0S
+0T
+0U
+0V
+0W
+0X
+0Y
+0Z
+0[
+b0 \
+b0 ]
+b0 ^
+b0 _
+b0 `
+b0 a
+b0 b
+b0 c
+b0 d
+0e
+0f
+0g
+0h
+0i
+0j
+0k
+0l
+b0 m
+b0 n
+b0 o
+b0 p
+b0 q
+b0 r
+b0 s
+b0 t
+b11 u
+b11 v
+b11 w
+0x
+b11 y
+b11 z
+b11 {
+0|
+b11 }
+b11 ~
+b11 !!
+0"!
+b11 #!
+b11 $!
+b11 %!
+0&!
+b11 '!
+b11 (!
+b11 )!
+0*!
+b11 +!
+b11 ,!
+b11 -!
+0.!
+b11 /!
+b11 0!
+b11 1!
+02!
+b11 3!
+b11 4!
+b11 5!
+06!
+b1 7!
+b1 8!
+09!
+0:!
+0;!
+0<!
+0=!
+0>!
+0?!
+0@!
+0A!
+0B!
+0C!
+0D!
+0E!
+0F!
+0G!
+0H!
+0I!
+0J!
+0K!
+0L!
+0M!
+0N!
+0O!
+0P!
+0Q!
+0R!
+0S!
+0T!
+0U!
+0V!
+0W!
+b0 X!
+b0 Y!
+b0 Z!
+b1 [!
+b10 \!
+b11 ]!
+$end
+#5000
+1+
+11
+#10000
+0+
+01
+#15000
+1+
+11
+#20000
+0+
+01
+#25000
+1+
+11
+#30000
+0+
+01
+#35000
+1+
+11
+#40000
+0+
+01
+#45000
+1+
+11
+#50000
+0,
+0+
+01
+02
+#55000
+1+
+11
+#60000
+0+
+01
+#65000
+1+
+11
+#70000
+0+
+01
+#75000
+1+
+11
+#80000
+0+
+01
+#85000
+1+
+11
+#90000
+0+
+01
+#95000
+1+
+11
+#100000
+1-
+b100 /
+0+
+01
+b100 5
+13
+b10000 7!
+b1 Y!
+#105000
+1+
+11
+b1 X!
+1W!
+b10 Y!
+1Z
+1V
+#110000
+0+
+01
+#115000
+1+
+11
+b1 \
+b10 X!
+b1 !
+1M!
+19!
+12!
+b10 /!
+1&!
+b10 #!
+1x
+b10 u
+1e
+1h
+1k
+b10 w
+b10 %!
+b10 1!
+1K!
+0k
+0h
+0e
+1W
+0W!
+0Z
+0V
+09!
+0K!
+0W
+#120000
+0+
+01
+#125000
+1.
+0-
+1+
+11
+03
+14
+b0 Y!
+1V!
+1Y
+1B
+#130000
+0+
+01
+#135000
+1+
+11
+b10 `
+b0 X!
+b10 %
+1Q!
+1F!
+b1 3!
+b1 0!
+b0 /!
+b1 (!
+b1 '!
+b1 4!
+b1 z
+b1 y
+b1 {
+b1 )!
+b0 1!
+b1 5!
+1L!
+1W
+0V!
+0Y
+0B
+0F!
+0L!
+0W
+#140000
+0+
+01
+#145000
+1+
+11
+#150000
+0+
+01
+#155000
+1+
+11
+#160000
+0+
+01
+#165000
+1+
+11
+#170000
+0+
+01
+#175000
+1-
+0.
+b1000 /
+b1 0
+1+
+11
+b1 6
+b1000 5
+04
+13
+b10 8!
+b100000000 7!
+b1 Y!
+#180000
+0+
+01
+#185000
+1+
+11
+b1 X!
+1W!
+b10 Y!
+1Z
+1U
+#190000
+0+
+01
+#195000
+1+
+11
+b1 ]
+b10 X!
+b1 "
+1N!
+1:!
+1*!
+b0 '!
+b10 v
+b11 u
+b0 )!
+1K!
+1W
+0W!
+0Z
+0U
+0:!
+0K!
+0W
+#200000
+1.
+0-
+0+
+01
+03
+14
+b0 Y!
+1V!
+1Y
+1>
+#205000
+1+
+11
+b10 d
+b0 X!
+b10 )
+1U!
+1J!
+b11 0!
+b1 ,!
+b1 ~
+b1 !!
+b1 -!
+1L!
+1W
+0V!
+0Y
+0>
+0J!
+0L!
+0W
+#210000
+0+
+01
+#215000
+1+
+11
+#220000
+0+
+01
+#225000
+1+
+11
+#230000
+0+
+01
+#235000
+1+
+11
+#240000
+0+
+01
+#245000
+1+
+11
+#250000
+1-
+0.
+b110 /
+b10 0
+0+
+01
+b10 6
+b110 5
+04
+13
+b100 8!
+b1000000 7!
+b1 Y!
+#255000
+1+
+11
+b1 X!
+1W!
+b10 Y!
+1Z
+1T
+#260000
+0+
+01
+#265000
+1+
+11
+b1 ^
+b10 X!
+b1 #
+1O!
+1;!
+16!
+b0 3!
+1.!
+b10 +!
+b11 v
+b11 w
+b0 -!
+b0 5!
+1K!
+1e
+1W
+b1 m
+1X
+b1 *
+0W!
+0Z
+0T
+0;!
+0K!
+0W
+#270000
+0+
+01
+#275000
+1.
+0-
+1+
+11
+03
+14
+b11 Y!
+1V!
+1Y
+1@
+#280000
+0+
+01
+#285000
+1+
+11
+b10 b
+b11 X!
+b10 '
+1S!
+1H!
+b1 $!
+1"!
+b1 }
+b0 %!
+1L!
+1W
+0V!
+0Y
+0@
+0H!
+0L!
+0W
+#290000
+0+
+01
+#295000
+1+
+11
+#300000
+0.
+0+
+01
+04
+#303000

tests/vcd-files/sources.csv

@@ -0,0 +1,17 @@
+Icarus,https://github.com/dpretet/vcd/blob/master/test1.vcd,https://github.com/ombhilare999/riscv-core/blob/master/src/rv32_soc_TB.vcd,https://github.com/b06902044/computer_architecture/blob/main/CPU.vcd
+Verilator,https://github.com/wavedrom/vcd-samples/blob/trunk/swerv1.vcd,https://github.com/bigBrain1901/nPOWER-ISA-5-STAGE-PIPELINED-CPU/blob/master/post_compile_files/vlt_dump.vcd,
+GHDL,https://raw.githubusercontent.com/AdoobII/idea_21s/main/vhdl/idea.vcd,https://github.com/gaoqqt2n/CPU/blob/master/SuperPipelineCPU/vcdfile/pcpu.vcd,https://github.com/charlycop/VLSI-1/blob/master/EXEC/ALU/alu.vcd
+VCS,https://raw.githubusercontent.com/ameyjain/8-bit-Microprocessor/master/8-bit%20microprocessor/processor.vcd,https://raw.githubusercontent.com/Akashay-Singla/RISC-V/main/Pipeline/datapath_log.vcd,https://raw.githubusercontent.com/sathyapriyanka/APB_UVC_UVM/main/Apb_slave_uvm_new.vcd
+QuestaSim,https://github.com/mr-gaurav/Sequence-Counter/blob/main/test.vcd,https://github.com/SparshAgarwal/Computer-Architecture/blob/master/hw3/hw3_1/dump.vcd,
+ModelSim,https://github.com/Mohammad-Heydariii/Digital-Systems-Lab-Course/blob/main/Lab_project4/modelsim_files/clkdiv2n_tb.vcd,https://github.com/sh619/Songyu_Huang-Chisel/blob/main/MU0_final_version/simulation/qsim/CPU_Design.msim.vcd,
+Quartus,https://github.com/PedroTLemos/ProjetoInfraHard/blob/master/mipsHardware.vcd,,
+SystemC,https://github.com/jroslindo/Mips-Systemc/blob/main/REGISTRADORES_32_bits/wave_registradores.vcd,https://github.com/amrhas/PDRNoC/blob/VCRouter/noctweak/Debug/waveform.vcd.vcd,
+Treadle,https://github.com/chipsalliance/treadle/blob/master/src/test/resources/GCD.vcd,,
+Aldec,https://github.com/SVeilleux9/FPGA-GPIO-Extender/blob/main/Firmware/aldec/SPI_Write/SPI_Write.vcd,,
+Riviera-PRO,https://github.com/prathampathak/Tic-Tac-Tao/blob/main/dump.vcd,,
+MyHDL,https://github.com/aibtw/myHdl_Projects/blob/main/SimpleMemory/Simple_Memory.vcd,https://github.com/Abhishek010397/Programming-RISC-V/blob/master/top.vcd,https://github.com/DarthSkipper/myHDL_Sigmoid/blob/master/out/testbench/sigmoid_tb.vcd
+ncsim,https://github.com/amiteee78/RTL_design/blob/master/ffdiv_32bit/ffdiv_32bit_prop_binom/run_cad/ffdiv_32bit_tb.vcd,,
+xilinx_isim,https://github.com/mukul54/qrs-peak-fpga/blob/master/utkarsh/utkarsh.sim/sim_1/behav/xsim/test.vcd,https://github.com/DanieleParravicini/regex_coprocessor/blob/master/scripts/sim/test2x2_regex22_string1.vcd,https://github.com/pabloec1729/Hashes-generator/blob/master/RTL/velocidad/test.vcd
+vivado,https://github.com/saharmalmir/Eth2Ser/blob/master/UART2ETH.runs/impl_1/iladata.vcd,https://github.com/BradMcDanel/multiplication-free-dnn/blob/master/verilog/iladata.vcd,
+GTKWave-Analyzer,https://github.com/Asfagus/Network-Switch/blob/main/perm_current.vcd,,
+Amaranth,Locally Simulated File,,

tests/vcd-files/treadle/GCD.vcd

@@ -0,0 +1,79 @@
+
+$date
+  2016-10-13T16:31+0000
+$end
+$version
+  0.1
+$end
+$comment
+  
+$end
+$timescale 1ps  $end
+$scope module GCD $end
+$var wire 32 . GEN_0 $end
+$var wire 32 + GEN_1 $end
+$var wire 1 ) T_13 $end
+$var wire 33 , T_14 $end
+$var wire 32 - T_15 $end
+$var wire 1 * T_17 $end
+$var wire 33 / T_18 $end
+$var wire 32 0 T_19 $end
+$var wire 1 % T_21 $end
+$var wire 32 ! io_a $end
+$var wire 32 " io_b $end
+$var wire 1 # io_e $end
+$var wire 1 & io_v $end
+$var wire 32 ( io_z $end
+$var wire 32 ' x $end
+$var wire 32 $ y $end
+$upscope $end
+$enddefinitions $end
+$dumpvars
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0
+0#
+0%
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx (
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx -
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx /
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx "
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx $
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx '
+0*
+0&
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx ,
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx !
+0)
+#1
+b00000000000000000000000000100010 '
+0%
+0&
+b00000000000000000000000000100010 !
+b10011100000011100100110000011100 (
+b00000000000000000000000000010001 "
+b00000000000000000000000000010001 $
+1#
+#2
+b00000000000000000000000000010001 -
+b00000000000000000000000000010001 +
+0#
+0*
+b000000000000000000000000000010001 ,
+b00000000000000000000000000100010 (
+b00000000000000000000000000010001 '
+b00000000000000000000000000010001 .
+1)
+#3
+b00000000000000000000000000010001 (
+0)
+1*
+b000000000000000000000000000000000 /
+b00000000000000000000000000000000 0
+b00000000000000000000000000000000 $
+b00000000000000000000000000000000 +
+#4
+1&
+0*
+1)
+1%

tests/vcd-files/vcs/Apb_slave_uvm_new.vcd

@@ -0,0 +1,430 @@
+$date
+	Mon May 24 02:40:52 2021
+$end
+
+$version
+	Synopsys VCS version Q-2020.03-SP1-1
+$end
+
+$timescale
+	1ns
+$end
+
+$comment Csum: 1 5fb93f7337e7c1f7 $end
+
+
+$scope module $unit $end
+$upscope $end
+
+
+$scope module apb_pkg $end
+$upscope $end
+
+
+$scope module top $end
+$var reg 1 ! clk $end
+
+$scope begin unnamed$$_vcs_2 $end
+$upscope $end
+
+
+$scope begin unnamed$$_vcs_0 $end
+$upscope $end
+
+
+$scope begin unnamed$$_vcs_1 $end
+$upscope $end
+
+
+$scope begin unnamed$$_vcs_3 $end
+$upscope $end
+
+
+$scope module masslav_if $end
+$var reg 1 " clk $end
+$var reg 32 # Paddr [31:0] $end
+$var reg 32 $ Pwdata [31:0] $end
+$var reg 1 % Psel $end
+$var reg 1 & Pwrite $end
+$var reg 1 ' Penable $end
+$var reg 1 ( Pready $end
+$var reg 32 ) Prdata [31:0] $end
+$var reg 1 * Pslave_err $end
+$upscope $end
+
+$upscope $end
+
+
+$scope module uvm_pkg $end
+$var reg 32 + UVM_UNBOUNDED_CONNECTIONS [31:0] $end
+$var reg 1 , uvm_start_uvm_declarations $end
+$var time 64 - setting_offset $end
+$var reg 32 . setting_verbosity [31:0] $end
+$var reg 1 / is_verdi_set_verbosity_called $end
+$var reg 32 0 uvm_global_random_seed [31:0] $end
+$var reg 1 1 is_uvm_factory_trace_checked $end
+$var reg 1 2 is_verdi_trace_fac $end
+$upscope $end
+
+$enddefinitions $end
+
+#0
+$dumpvars
+11
+0/
+02
+1,
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx -
+b11111111111111111111111111111111 +
+b00000000000000000000000000000000 .
+b01000010000001111100110001000111 0
+0!
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx )
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx $
+bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx #
+x'
+x(
+x%
+x*
+x&
+0"
+$end
+#5
+1!
+1"
+#6
+0&
+1%
+b00000000000000000000000011011010 #
+0'
+#10
+0!
+0"
+#15
+1!
+1"
+#16
+1'
+b00000000000000000000000011011101 )
+0*
+#20
+0!
+0"
+#25
+1!
+1"
+#26
+1(
+#30
+0!
+0"
+#35
+1!
+1"
+#36
+0'
+0(
+b00000000000000000000000001011100 #
+#40
+0!
+0"
+#45
+1!
+1"
+#46
+1'
+b00000000000000000000000010001110 )
+#50
+0!
+0"
+#55
+1!
+1"
+#56
+1(
+#60
+0!
+0"
+#65
+1!
+1"
+#66
+0'
+0(
+b00000000000000000000000010111101 #
+#70
+0!
+0"
+#75
+1!
+1"
+#76
+1'
+b00000000000000000000000000010100 )
+#80
+0!
+0"
+#85
+1!
+1"
+#86
+1(
+#90
+0!
+0"
+#95
+1!
+1"
+#96
+0'
+0(
+b00000000000000000000000011001100 #
+#100
+0!
+0"
+#105
+1!
+1"
+#106
+1'
+b00000000000000000000000000000011 )
+#110
+0!
+0"
+#115
+1!
+1"
+#116
+1(
+#120
+0!
+0"
+#125
+1!
+1"
+#126
+0'
+0(
+b00000000000000000000000001101111 #
+#130
+0!
+0"
+#135
+1!
+1"
+#136
+1'
+b00000000000000000000000000010101 )
+#140
+0!
+0"
+#145
+1!
+1"
+#146
+1(
+#150
+0!
+0"
+#155
+1!
+1"
+#156
+0'
+0(
+b00000000000000000000000011100100 #
+#160
+0!
+0"
+#165
+1!
+1"
+#166
+1'
+b00000000000000000000000000011110 )
+#170
+0!
+0"
+#175
+1!
+1"
+#176
+1(
+#180
+0!
+0"
+#185
+1!
+1"
+#186
+0'
+0(
+b00000000000000000000000011110001 #
+#190
+0!
+0"
+#195
+1!
+1"
+#196
+1'
+b00000000000000000000000011011111 )
+#200
+0!
+0"
+#205
+1!
+1"
+#206
+1(
+#210
+0!
+0"
+#215
+1!
+1"
+#216
+0'
+0(
+b00000000000000000000000011001000 #
+#220
+0!
+0"
+#225
+1!
+1"
+#226
+1'
+b00000000000000000000000011000100 )
+#230
+0!
+0"
+#235
+1!
+1"
+#236
+1(
+#240
+0!
+0"
+#245
+1!
+1"
+#246
+0'
+0(
+b00000000000000000000000001011101 #
+#250
+0!
+0"
+#255
+1!
+1"
+#256
+1'
+b00000000000000000000000001010000 )
+#260
+0!
+0"
+#265
+1!
+1"
+#266
+1(
+#270
+0!
+0"
+#275
+1!
+1"
+#276
+0'
+0(
+b00000000000000000000000001001011 #
+#280
+0!
+0"
+#285
+1!
+1"
+#286
+1'
+b00000000000000000000000010111001 )
+#290
+0!
+0"
+#295
+1!
+1"
+#296
+1(
+#300
+0!
+0"
+#305
+1!
+1"
+#306
+0'
+0%
+0(
+#310
+0!
+0"
+#315
+1!
+1"
+#320
+0!
+0"
+#325
+1!
+1"
+#330
+0!
+0"
+#335
+1!
+1"
+#340
+0!
+0"
+#345
+1!
+1"
+#350
+0!
+0"
+#355
+1!
+1"
+#360
+0!
+0"
+#365
+1!
+1"
+#370
+0!
+0"
+#375
+1!
+1"
+#380
+0!
+0"
+#385
+1!
+1"
+#390
+0!
+0"
+#395
+1!
+1"
+#400
+0!
+0"
+#405
+1!
+1"