riscv-bluespec-classic/bs/Uart/Uart.bs
2025-04-21 08:58:55 -04:00

34 lines
949 B
Haskell

package Uart(
mkUartPhy,
UartPhy(..)
) where
import Serializer
import Deserializer
import BusTypes
import Types
import Util
import FIFO
import FIFOF
import SpecialFIFOs
-- Out is out from the FPGA and In is in to the FPGA
interface (UartPhy :: # -> # -> *) clkFreq baudRate =
bitOut :: Bit 1
bitIn :: Bit 1 -> Action
mkUartPhy :: (BusTypes.BusServer inFlightTransactions numClients)
-> Module (UartPhy clkFreq baudRate)
mkUartPhy dedicatedServerInterface = do
fileHandle :: Handle <- openFile "mkUartPhy.log" WriteMode
deserializer :: Deserializer clkFreq baudRate <- mkDeserialize fileHandle
serializer :: Serializer clkFreq baudRate <- mkSerialize fileHandle
taggedResponseBuffer :: (FIFO (BusTypes.TaggedBusResponse inFlightTransactions)) <- mkFIFO
return |>
interface UartPhy
bitOut = 1
bitIn bitVal = do
deserializer.putBitIn bitVal