From 842c19d441548fe43086e8c83d65ceaaad95d654 Mon Sep 17 00:00:00 2001 From: Yehowshua Immanuel Date: Sun, 20 Apr 2025 18:06:17 -0400 Subject: [PATCH] make server map, normalize uart interfaces --- bs/ServerMap.bs | 35 +++++++++++++++++++++++++++++++++++ bs/Top.bs | 1 + bs/Uart/Uart.bs | 4 ++-- 3 files changed, 38 insertions(+), 2 deletions(-) create mode 100644 bs/ServerMap.bs diff --git a/bs/ServerMap.bs b/bs/ServerMap.bs new file mode 100644 index 0000000..85d0d17 --- /dev/null +++ b/bs/ServerMap.bs @@ -0,0 +1,35 @@ +package ServerMap( + ramServerStart, + ramServerEnd, + uartServerStart, + uartServerEnd, + serverMap + ) where + +import Types +import BusTypes + +bytesInRam :: Types.Addr +bytesInRam = 1024 + +-- number of servers currently supported by this bus map +type NumServers = 2 + +ramServerStart :: Types.Addr +ramServerStart = 0x80000000 +ramServerEnd :: Types.Addr +ramServerEnd = ramServerStart + (bytesInRam - 1) + +uartServerStart :: Types.Addr +uartServerStart = 0x10000000 +uartServerEnd :: Types.Addr +uartServerEnd = uartServerStart + 7 + +-- be careful when hooking up the servers that +-- the uart is attached to index 0 whilst the ram +-- is attached to index 1 +serverMap :: Types.Addr -> Maybe (MkServerIdx 2) +serverMap addr = + if addr >= ramServerStart && addr <= ramServerEnd then Just 1 + else if addr >= uartServerStart && addr <= uartServerEnd then Just 0 + else Nothing \ No newline at end of file diff --git a/bs/Top.bs b/bs/Top.bs index 8244a1b..400f37a 100644 --- a/bs/Top.bs +++ b/bs/Top.bs @@ -13,6 +13,7 @@ import ActionSeq import Vector import BusTypes import Uart +import ServerMap import TagEngineTester diff --git a/bs/Uart/Uart.bs b/bs/Uart/Uart.bs index 20d18f5..7cc45b4 100644 --- a/bs/Uart/Uart.bs +++ b/bs/Uart/Uart.bs @@ -22,5 +22,5 @@ mkUartPhy dedicatedServerInterface = do return |> interface UartPhy bitOut = 1 - bitIn bitVal = do - action {} \ No newline at end of file + bitIn bitVal = do + deserializer.putBitIn bitVal \ No newline at end of file