- [x] ::= | - [x] ::= “" + - [x] ::= “” + - [x] ::= + ’ * - [x] ::= “0” | “1” | “2” | “3” | “4” | “5” | “6” | “7” | “8” | “9” - [x] ::= “0” | “1” | “x” | “z” | “m” | “-“ - [x] ::= “-“? + - [ ] ::= ? * - [x] ::= “autoidx” - [ ] ::= * - [x] ::= “module” - [ ] ::= ( )* - [ ] ::= “parameter” ? - [ ] ::= | | - [x] ::= “end” - [ ] ::= “attribute” - [ ] ::= “[” (“:” )? “]” “{” * “}” - [ ] ::= “connect” - [ ] ::= * - [ ] ::= “wire” * - [ ] ::= - [ ] ::= “width” “offset” “input” “output” “inout” “upto” “signed” - [ ] ::= * - [ ] ::= “memory” * - [ ] ::= “width” “size” “offset” - [ ] ::= * * - [ ] ::= “cell” - [ ] ::= - [ ] ::= - [ ] ::= “parameter” (“signed” | “real”)? “connect” - [ ] ::= “end” - [ ] ::= * - [ ] ::= “process” - [ ] ::= * ? * * - [ ] ::= “assign” - [ ] ::= - [ ] ::= - [ ] ::= “end” - [ ] ::= * - [ ] := * “switch” - [ ] ::= * - [ ] ::= “case” ? - [ ] ::= (“,” )* - [ ] ::= ( | )* - [ ] ::= “end” - [ ] ::= * - [ ] ::= “sync” “sync” “global” “sync” “init” “sync” “always” - [ ] ::= “low” | “high” | “posedge” | “negedge” | “edge” - [ ] ::= “update”