elucidate relationship between statement terminating EOL and advancing to keyword
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4 changed files with 104 additions and 49 deletions
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@ -35,7 +35,10 @@ module RTLILParser.AST (
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-- Switches
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Switch(..), SwitchStmt(..), Case(..), CaseStmt(..), Compare(..),
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CaseBodyVariants(..), CaseBody(..)
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CaseBodyVariants(..), CaseBody(..),
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-- Syncs
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Sync(..), SyncStmt(..), SyncType(..), UpdateStmt(..)
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) where
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import Text.Read (Lexeme(Ident))
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@ -128,10 +131,11 @@ data CellBodyStmt = CellBodyParameter
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deriving (Show)
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-- Processes
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-- data ProcessBody = ProcessBody [AssignStmt]
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data AssignStmt = AssignStmt DestSigSpec SrcSigSpec
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deriving (Show)
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data DestSigSpec = DestSigSpec SigSpec deriving (Show)
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data SrcSigSpec = SrcSigSpec SigSpec deriving (Show)
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data AssignStmt = AssignStmt DestSigSpec SrcSigSpec
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deriving (Show)
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-- Switches
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data Switch = Switch SwitchStmt [Case]
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@ -147,4 +151,18 @@ data CaseBodyVariants = CaseBodySwitchVariant Switch
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| CaseBodyAssignVariant AssignStmt
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deriving (Show)
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data CaseBody = CaseBody [CaseBodyVariants] deriving (Show)
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-- Syncs
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-- Syncs
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data Sync = Sync SyncStmt [UpdateStmt] deriving (Show)
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data SyncStmt = SigSpecPredicated SyncType SigSpec
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| Global
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| Init
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| Always
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deriving (Show)
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data SyncType = Low
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| High
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| Posedge
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| Negedge
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| Edge
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deriving (Show)
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data UpdateStmt = UpdateStmt DestSigSpec SrcSigSpec deriving (Show)
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@ -41,7 +41,10 @@ import RTLILParser.AST (
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-- Switches
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Switch(..), SwitchStmt(..), Case(..), CaseStmt(..), Compare(..),
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CaseBodyVariants(..), CaseBody(..)
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CaseBodyVariants(..), CaseBody(..),
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-- Syncs
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Sync(..), SyncStmt(..), SyncType(..), UpdateStmt(..)
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)
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import RTLILParser.Primitives(
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pWs
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@ -50,6 +53,7 @@ import RTLILParser.Primitives(
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,pEol
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,pOctal
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,pEscapedChar
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,pEolAndAdvanceToNextNonWs
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)
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import Text.Parsec.Token (GenLanguageDef(caseSensitive))
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import GHC.IO.Handle.Types (Handle__(Handle__))
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@ -106,17 +110,20 @@ pString =
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-- Autoindex statements
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pAutoIdxStmt :: Parser AutoIdxStmt
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pAutoIdxStmt = AutoIdxStmt <$> (string "autoidx" *> pWs *> pInteger <* pEol <* pMaybeWs)
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pAutoIdxStmt = AutoIdxStmt
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<$> (string "autoidx" *> pWs *>
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pInteger <* pEolAndAdvanceToNextNonWs)
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-- Module
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pModuleStmt :: Parser Id
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pModuleStmt = string "module" *> pWs *> pId <* pEol <* pMaybeWs
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pModuleStmt = string "module" *> pWs *> pId <*
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pEolAndAdvanceToNextNonWs
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pParamStmt :: Parser ParamStmt
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pParamStmt = ParamStmt
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<$> (string "parameter" *> pWs *> pId <* pWs)
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<*> optionMaybe pConstant
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<* pEol <* pMaybeWs
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<* pEolAndAdvanceToNextNonWs
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pConstant :: Parser Constant
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pConstant =
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@ -132,7 +139,7 @@ pAttrStmt :: Parser AttrStmt
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pAttrStmt = AttrStmt
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<$> (string "attribute" *> pWs *> pId)
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<*> (pWs *> pConstant)
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<* pEol <* pMaybeWs
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<* pEolAndAdvanceToNextNonWs
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-- Signal Specifications
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pSigSpec :: Parser SigSpec
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@ -169,7 +176,7 @@ pConnStmt :: Parser ConnStmt
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pConnStmt = ConnStmt
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<$> (string "connect" *> pWs *> pSigSpec)
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<*> (pWs *> pSigSpec)
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<* pEol <* pMaybeWs
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<* pEolAndAdvanceToNextNonWs
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-- Wires
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pWire :: Parser Wire
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@ -186,7 +193,7 @@ pWireStmt =
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<*> (WireId <$> pId)
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<* pWs
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<*> many pWireOption
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<* pEol <* pMaybeWs
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<* pEolAndAdvanceToNextNonWs
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pWireId :: Parser WireId
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pWireId = WireId <$> pId
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@ -216,7 +223,7 @@ pMemoryStmt =
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<*> (MemoryID <$> pId)
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<* pWs
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<*> many pMemoryOption
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<* pEol <* pMaybeWs
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<* pEolAndAdvanceToNextNonWs
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pMemoryOption :: Parser MemoryOption
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pMemoryOption =
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@ -239,7 +246,7 @@ pCellStmt = do
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cellType <- CellType <$> pId
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_ <- pWs
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cellId <- CellId <$> pId
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_ <- pEol <* pMaybeWs
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_ <- pEolAndAdvanceToNextNonWs
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return $ CellStmt cellId cellType
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pCellBodyStmt :: Parser CellBodyStmt
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@ -255,37 +262,33 @@ pCellBodyParameter = do
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_ <- string "parameter" <* pWs
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sign <- optionMaybe pParameterSign <* pMaybeWs
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id <- pId
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const <- pConstant <* pEol <* pMaybeWs
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const <- pConstant <* pEolAndAdvanceToNextNonWs
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return $ CellBodyParameter sign id const
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pCellBodyConnect :: Parser CellBodyStmt
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pCellBodyConnect = do
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_ <- string "connect" <* pWs
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id <- pId <* pWs
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sigSpec <- pSigSpec <* pEol <* pMaybeWs
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sigSpec <- pSigSpec <* pEolAndAdvanceToNextNonWs
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return $ CellConnect id sigSpec
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-- Processes
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-- pProcessBody ::
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pAssignStmt :: Parser AssignStmt
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pAssignStmt = AssignStmt
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<$> (string "assign" *> pWs *> pDestSigSpec)
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<*> (pWs *> pSrcSigSpec <* pEolAndAdvanceToNextNonWs)
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pDestSigSpec :: Parser DestSigSpec
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pDestSigSpec = DestSigSpec <$> pSigSpec
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pSrcSigSpec :: Parser SrcSigSpec
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pSrcSigSpec = SrcSigSpec <$> pSigSpec
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pAssignStmt :: Parser AssignStmt
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pAssignStmt = AssignStmt
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<$> (string "assign" *> pWs *> pDestSigSpec)
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<*> (pWs *> pSrcSigSpec <* pEol <* pMaybeWs)
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pProcEndStmt :: Parser ()
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pProcEndStmt = void (string "end" <* pEolAndAdvanceToNextNonWs)
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-- Switches
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-- - [ ] <switch> ::= <switch-stmt> <case>* <switch-end-stmt>
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-- - [ ] <switch-stmt> ::= <attr-stmt>* switch <sigspec> <eol>
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-- - [ ] <case> ::= <attr-stmt>* <case-stmt> <case-body>
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-- - [x] <case-stmt> ::= case <compare>? <eol>
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-- - [x] <compare> ::= <sigspec> (, <sigspec>)*
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-- - [ ] <case-body> ::= (<switch> | <assign-stmt>)*
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-- - [ ] <switch-end-stmt> ::= end <eol>
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pSwitch :: Parser Switch
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pSwitch = Switch
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<$> pSwitchStmt
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@ -295,7 +298,7 @@ pSwitchStmt :: Parser SwitchStmt
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pSwitchStmt = do
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attrs <- many pAttrStmt
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_ <- string "switch" <* pWs
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sigspec <- pSigSpec <* pEol <* pMaybeWs
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sigspec <- pSigSpec <* pEolAndAdvanceToNextNonWs
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return $ SwitchStmt sigspec attrs
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pCase :: Parser Case
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<$> (
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string "case" *> pWs
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*> optionMaybe pCompare
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<* pEol <* pMaybeWs)
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<* pEolAndAdvanceToNextNonWs)
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pCompare :: Parser Compare
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pCompare = Compare
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@ -324,11 +327,21 @@ pCaseBodyVariant =
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(CaseBodyAssignVariant <$> pAssignStmt)
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pSwitchEndStmt :: Parser ()
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pSwitchEndStmt = void (string "end" *> pEol *> pMaybeWs)
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pSwitchEndStmt = void (string "end" *> pEolAndAdvanceToNextNonWs)
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-- Syncs
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pSyncType :: Parser SyncType
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pSyncType =
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(Low <$ string "low" ) <|>
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(High <$ string "high" ) <|>
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(Posedge <$ string "posedge" ) <|>
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(Negedge <$ string "negedge" ) <|>
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(Edge <$ string "edge" )
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pUpdateStmt :: Parser UpdateStmt
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pUpdateStmt = UpdateStmt
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<$> (string "update" *> pWs *> pDestSigSpec)
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<*> (pWs *> pSrcSigSpec <* pEolAndAdvanceToNextNonWs)
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-- would correspond to `123456789[0:9][0:8]`
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@ -5,6 +5,7 @@ module RTLILParser.Primitives(
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,pEol
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,pOctal
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,pEscapedChar
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,pEolAndAdvanceToNextNonWs
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) where
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import Control.Monad (void)
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@ -43,3 +44,6 @@ pNonWs = noneOf " \t\r\n"
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pEol :: Parser String
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pEol = many1 (oneOf "\r\n")
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pEolAndAdvanceToNextNonWs :: Parser ()
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pEolAndAdvanceToNextNonWs = void $ pEol *> pMaybeWs
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