47 lines
1.2 KiB
Plaintext
47 lines
1.2 KiB
Plaintext
package Core;
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import ClkDivider::*;
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import Prelude::*;
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interface Core#(numeric type clkFreq);
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method Bit#(8) get_char();
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method Bit#(8) get_led();
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method Action put_char(Bit#(8) byte_in);
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endinterface
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module mkCore(Core#(clkFreq));
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// Reg # (UInt # (32)) counter <- mkReg(0);
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Reg # (UInt # (TLog # (clkFreq))) counter <- mkReg(0);
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Wire # (Bool) tick_second <- mkDWire(False);
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Wire # (Bit # (8)) uart_out <- mkWire;
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Reg # (Bit # (8)) led_out <- mkReg(0);
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Integer clkFreqInt = valueOf(clkFreq);
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UInt#(TLog#(clkFreq)) clkFreqUInt = fromInteger(clkFreqInt);
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Real val = fromInteger(clkFreqInt);
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messageM("mkCore clkFreq" + realToString(val));
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Bool pulse_every_second = counter == clkFreqUInt;
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rule count;
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counter <= (counter == clkFreqUInt) ? 0 : counter + 1;
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endrule
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rule counting_led(pulse_every_second);
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led_out <= led_out + 1;
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endrule
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method Bit#(8) get_char();
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return uart_out;
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endmethod
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method Bit#(8) get_led();
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return led_out;
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endmethod
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method Action put_char(Bit#(8) byte_in);
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Bit#(8) value = byte_in;
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uart_out <= value;
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// led_out <= value;
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endmethod
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endmodule
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endpackage |