diff --git a/bs/Top.bs b/bs/Top.bs
index 373589c..f4f1cda 100644
--- a/bs/Top.bs
+++ b/bs/Top.bs
@@ -21,44 +21,6 @@ interface ITop = {
  ;ftdi_txd :: Bit 1 -> Action {-# always_ready , always_enabled  #-}
 };
 
-interface BusClient =
-  request  :: Bit 1
-  response :: Bit 1 -> Action
-
-mkBusClient :: Module BusClient
-mkBusClient = module
-  reqReg :: Reg (Bit 1) <- mkReg 0
-  return $
-    interface BusClient
-      request = reqReg
-      response resp = do
-        reqReg := 0  -- Reset request after receiving response
-
-interface Bus =
-  request  :: Bit 1 -> Action
-  response :: Bit 1
-
-mkBus :: Module Bus
-mkBus = module
-  respReg :: Reg (Bit 1) <- mkReg 0
-  return $
-    interface Bus
-      request req = do
-        respReg := req  -- Simple pass-through for this example
-      response = respReg
-
--- -- Function to connect Bus to BusClient
-connectBusToClient :: Bus -> BusClient -> Rules
-connectBusToClient bus client =
-  rules
-    "busConnection": when True ==> do
-      bus.request client.request
-      client.response bus.response
-
--- need to implement mkBus
-
--- need function that can connect Bus to BusClient
-
 mkTop :: Module ITop
 mkTop = do
   fileHandle   :: Handle <- openFile "compile.log" WriteMode
@@ -66,15 +28,9 @@ mkTop = do
   serializer   :: ISerializer FCLK BAUD <- mkSerialize fileHandle
   core         :: Core FCLK <- mkCore
 
-  bus          :: Bus <- mkBus
-  busClient    :: BusClient <- mkBusClient
-
   persistLed  :: Reg (Bit 8) <- mkReg 0
   messageM $ "Hallo!!" + (realToString 5)
 
-  -- need to instantiate a Bus and BusClient
-  addRules $ connectBusToClient bus busClient
-
   addRules $
     rules
       -- need new rule that always connects Bus to BusClient