forked from Yehowshua/RiscV-Formal
62 lines
1.7 KiB
Haskell
62 lines
1.7 KiB
Haskell
module Peripherals.Uart (read) where
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import Clash.Prelude hiding (read)
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import Types (Byte)
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import Data.Char (ord)
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import Peripherals.UartCFFI (
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initTerminal,
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restoreTerminal,
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getCharFromTerminal,
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writeCharToTerminal,
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isCharAvailable,
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setupSigintHandler,
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wasCtrlCReceived
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)
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import BusTypes (
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TransactionSize(..),
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BusVal(..),
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ReadResponse(..),
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WriteResponse(..)
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)
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-- based on a 16550 UART which has an address space of 8 bytes
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type UartAddr = Unsigned 3
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-- Receiver Buffer Register address (commonly 0x0 for 16550 UART)
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rbrAddr :: UartAddr
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rbrAddr = 0x0
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-- Line Status Register address
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lsrAddr :: UartAddr
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lsrAddr = 0x5
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-- Helper function to convert Byte to BusVal based on TransactionSize
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busValFromByte :: TransactionSize -> Byte -> BusVal
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busValFromByte size val = case size of
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SizeByte -> BusByte val
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SizeHalfWord -> BusHalfWord (resize val)
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SizeFullWord -> BusFullWord (resize val)
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SizeDoubleWord -> BusDoubleWord (resize val)
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SizeQuadWord -> BusQuadWord (resize val)
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-- Reads a character from the terminal (RBR equivalent)
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buildRBR :: IO Byte
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buildRBR = do
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c <- getCharFromTerminal
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return $ fromIntegral (ord c) -- Convert Char to Byte
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-- Reads the Line Status Register (LSR) to check character availability
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buildLSR :: IO Byte
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buildLSR = do
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char_available <- isCharAvailable
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return $ fromIntegral char_available
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-- Updated 'read' function to handle RBR and LSR reads
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read :: TransactionSize -> UartAddr -> IO BusVal
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read size addr
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| addr == rbrAddr = busValFromByte size <$> buildRBR
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| addr == lsrAddr = busValFromByte size <$> buildLSR
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| otherwise = return $ busValFromByte size 0x00
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