Artturin/RiscV-Formal
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RiscV-Formal/hs
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Yehowshua Immanuel 88ec010f98 initial support for exceptions
2025-03-02 23:12:02 -05:00
..
Isa works even better now 2025-02-19 18:28:08 -05:00
Peripherals bus architecture re-built I think 2025-02-26 13:05:02 -05:00
Bus.hs initial support for exceptions 2025-03-02 23:12:02 -05:00
BusTypes.hs initial support for exceptions 2025-03-02 23:12:02 -05:00
Cpu.hs initial support for exceptions 2025-03-02 23:12:02 -05:00
Exceptions.hs initial support for exceptions 2025-03-02 23:12:02 -05:00
Fetch.hs initial support for exceptions 2025-03-02 23:12:02 -05:00
RegFiles.hs initial support for exceptions 2025-03-02 23:12:02 -05:00
Simulation.hs initial support for exceptions 2025-03-02 23:12:02 -05:00
Types.hs hopefully progressing to a more scalable bus architecture 2025-02-25 14:24:54 -05:00
Util.hs first commit 2025-02-12 23:54:15 -05:00