diff --git a/hs/Isa/Decode.hs b/hs/Decode.hs
similarity index 95%
rename from hs/Isa/Decode.hs
rename to hs/Decode.hs
index cc6729d..b7cf629 100644
--- a/hs/Isa/Decode.hs
+++ b/hs/Decode.hs
@@ -1,60 +1,28 @@
 {-# LANGUAGE DataKinds #-}
 {-# LANGUAGE NumericUnderscores #-}
 
-module Isa.Decode(decode) where
-
-import Isa.Forms(
-  FUNCT7, RS2, RS1, FUNCT3, RD, OPCODE,
-  IMM12, IMM13, IMM20, IMM21,
+module Decode(decode) where
 
+import DecodeTypes(
   RTypeFields(..), ITypeFields(..), STypeFields(..),
   BTypeFields(..), UTypeFields(..), JTypeFields(..),
-
   Opcode(..)
   )
 import Clash.Prelude
-import Data.Functor.Contravariant (Op)
-import Types(Mem, Addr, Insn)
-import Distribution.Backpack.FullUnitId (FullDb)
+import Types(Insn)
 
-getOpcode :: Insn -> Unsigned 7
-getOpcode instr = bitCoerce $ slice d6 d0 (pack instr)
-
-getImm12 :: Insn -> Unsigned 12
-getImm12 instr = bitCoerce $ slice d31 d20 (pack instr)
-
-getImm12SType :: Insn -> Unsigned 12
-getImm12SType instr = bitCoerce $ immediateUpper ++# immediateLower
+decode :: Insn -> Opcode
+decode insn =
+      decodeRType insn `orElse`
+      decodeIType insn `orElse`
+      decodeSType insn `orElse`
+      decodeBType insn `orElse`
+      decodeUType insn `orElse`
+      decodeJType insn
   where
-    immediateUpper = (slice d31 d25 (pack instr))
-    immediateLower = (slice d11 d7 (pack instr))
-
-getImm20UType :: Insn -> Unsigned 20
-getImm20UType instr = bitCoerce $ slice d31 d12 (pack instr)
-
-getImm13BType :: Insn -> Unsigned 13
-getImm13BType instr = bitCoerce $ imm12 ++# imm10_5 ++# imm4_1 ++# imm11 ++# zero
-  where
-    imm12   = slice d31 d31 (pack instr)      -- imm[12]
-    imm10_5 = slice d30 d25 (pack instr)      -- imm[10:5]
-    imm4_1  = slice d11 d8  (pack instr)      -- imm[4:1]
-    imm11   = slice d7  d7  (pack instr)      -- imm[11]
-    zero    = 0 :: BitVector 1                -- LSB always zero for B-type
-
-getFunct3 :: Insn -> Unsigned 3
-getFunct3 instr = bitCoerce $ slice d14 d12 (pack instr)
-
-getFunct7 :: Insn -> Unsigned 7
-getFunct7 instr = bitCoerce $ slice d31 d25 (pack instr)
-
-getRd :: Insn -> Unsigned 5
-getRd instr = bitCoerce $ slice d11 d7 (pack instr)
-
-getRs2 :: Insn -> Unsigned 5
-getRs2 instr = bitCoerce $ slice d24 d20 (pack instr)
-
-getRs1 :: Insn -> Unsigned 5
-getRs1 instr = bitCoerce $ slice d19 d15 (pack instr)
+    orElse :: Opcode -> Opcode -> Opcode
+    orElse Unimplemented y  = y
+    orElse x              _ = x
 
 decodeRType :: Insn -> Opcode
 decodeRType insn =
@@ -192,15 +160,41 @@ decodeJType insn =
     rd     = getRd insn
     imm21  = getImm21JType insn
 
-orElse :: Opcode -> Opcode -> Opcode
-orElse Unimplemented y = y
-orElse x              _ = x
+getOpcode :: Insn -> Unsigned 7
+getOpcode instr = bitCoerce $ slice d6 d0 (pack instr)
 
-decode :: Insn -> Opcode
-decode insn =
-      decodeRType insn `orElse`
-      decodeIType insn `orElse`
-      decodeSType insn `orElse`
-      decodeBType insn `orElse`
-      decodeUType insn `orElse`
-      decodeJType insn
+getImm12 :: Insn -> Unsigned 12
+getImm12 instr = bitCoerce $ slice d31 d20 (pack instr)
+
+getImm12SType :: Insn -> Unsigned 12
+getImm12SType instr = bitCoerce $ immediateUpper ++# immediateLower
+  where
+    immediateUpper = (slice d31 d25 (pack instr))
+    immediateLower = (slice d11 d7 (pack instr))
+
+getImm20UType :: Insn -> Unsigned 20
+getImm20UType instr = bitCoerce $ slice d31 d12 (pack instr)
+
+getImm13BType :: Insn -> Unsigned 13
+getImm13BType instr = bitCoerce $ imm12 ++# imm10_5 ++# imm4_1 ++# imm11 ++# zero
+  where
+    imm12   = slice d31 d31 (pack instr)      -- imm[12]
+    imm10_5 = slice d30 d25 (pack instr)      -- imm[10:5]
+    imm4_1  = slice d11 d8  (pack instr)      -- imm[4:1]
+    imm11   = slice d7  d7  (pack instr)      -- imm[11]
+    zero    = 0 :: BitVector 1                -- LSB always zero for B-type
+
+getFunct3 :: Insn -> Unsigned 3
+getFunct3 instr = bitCoerce $ slice d14 d12 (pack instr)
+
+getFunct7 :: Insn -> Unsigned 7
+getFunct7 instr = bitCoerce $ slice d31 d25 (pack instr)
+
+getRd :: Insn -> Unsigned 5
+getRd instr = bitCoerce $ slice d11 d7 (pack instr)
+
+getRs2 :: Insn -> Unsigned 5
+getRs2 instr = bitCoerce $ slice d24 d20 (pack instr)
+
+getRs1 :: Insn -> Unsigned 5
+getRs1 instr = bitCoerce $ slice d19 d15 (pack instr)
diff --git a/hs/Isa/Forms.hs b/hs/DecodeTypes.hs
similarity index 97%
rename from hs/Isa/Forms.hs
rename to hs/DecodeTypes.hs
index 3963748..f5b202e 100644
--- a/hs/Isa/Forms.hs
+++ b/hs/DecodeTypes.hs
@@ -1,7 +1,7 @@
 {-# LANGUAGE DataKinds #-}
 {-# LANGUAGE NumericUnderscores #-}
 
-module Isa.Forms(
+module DecodeTypes(
   FUNCT7, RS2, RS1, FUNCT3, RD, OPCODE,
   IMM12, IMM13, IMM20, IMM21,
 
@@ -11,7 +11,6 @@ module Isa.Forms(
   Opcode(..)
 ) where
 import Clash.Prelude
-import Types(Mem, Addr, Insn)
 
 type FUNCT7 = Unsigned 7
 type RS2    = Unsigned 5
diff --git a/hs/Simulation.hs b/hs/Simulation.hs
index e1384b6..231096a 100644
--- a/hs/Simulation.hs
+++ b/hs/Simulation.hs
@@ -20,7 +20,7 @@ import Cpu(
   RISCVCPU(..),
   riscvCPUInit)
 import Fetch(fetchInstruction, FetchResult (..))
-import Isa.Decode(decode)
+import Decode(decode)
 
 data Args = Args {
     firmware :: FilePath
diff --git a/rv_formal.cabal b/rv_formal.cabal
index e456f0b..bb68ec6 100644
--- a/rv_formal.cabal
+++ b/rv_formal.cabal
@@ -87,8 +87,8 @@ library
   exposed-modules:
     Simulation
   other-modules:
-    Isa.Decode,
-    Isa.Forms,
+    Decode,
+    DecodeTypes,
     Peripherals.Ram,
     Peripherals.Uart,
     Peripherals.UartCFFI,