diff --git a/hs/Peripherals/Uart.hs b/hs/Peripherals/Uart.hs
index 36fbbc9..fff754d 100644
--- a/hs/Peripherals/Uart.hs
+++ b/hs/Peripherals/Uart.hs
@@ -43,7 +43,7 @@ busValFromByte size val = case size of
 buildRBR :: IO Byte
 buildRBR = do
   c <- getCharFromTerminal
-  return $ fromIntegral (ord c)  -- Convert Char to Byte
+  return |> fromIntegral (ord c)  -- Convert Char to Byte
 
 -- Reads the Line Status Register (LSR) to check character availability
 buildLSR :: IO Byte
@@ -59,7 +59,7 @@ read :: TransactionSize -> UartAddr -> IO BusVal
 read size addr
   | addr == rbrAddr = fmap (busValFromByte size) buildRBR
   | addr == lsrAddr = fmap (busValFromByte size) buildLSR
-  | otherwise       = return $ busValFromByte size 0x00
+  | otherwise       = return |> busValFromByte size 0x00
 
 extractLowestByte :: BusVal -> Byte
 extractLowestByte (BusByte b)        = b
@@ -73,5 +73,5 @@ byteToChar = chr . fromIntegral
 
 write :: BusVal -> UartAddr -> IO ()
 write val addr
-  | addr == thrAddr = writeCharToTerminal $ byteToChar $ extractLowestByte val
+  | addr == thrAddr = writeCharToTerminal |> byteToChar |> extractLowestByte val
   | otherwise = return ()