diff --git a/hs/Simulation.hs b/hs/Simulation.hs
index c6cacbe..d3dbd65 100644
--- a/hs/Simulation.hs
+++ b/hs/Simulation.hs
@@ -46,7 +46,6 @@ simulationLoop n machine = do
   fetchResult <- fetchInstruction machinePeripherals currPc
   let decodeResult = decode fetchResult
   putStrLn |> show decodeResult P.++ debugInsn fetchResult
-  putStrLn $ "PC: " P.++ show currPc
   let pc' = currPc + 4
       cpu' = (cpu machine) { pc = pc' }
       machine' = machine { cpu = cpu' }
diff --git a/rv_tests/hello_world/Makefile b/rv_tests/hello_world/Makefile
index 87d8a1c..468fa6f 100644
--- a/rv_tests/hello_world/Makefile
+++ b/rv_tests/hello_world/Makefile
@@ -1,8 +1,9 @@
 # RISC-V toolchain
-CC = riscv64-unknown-elf-gcc
-AS = riscv64-unknown-elf-as
-LD = riscv64-unknown-elf-ld
-OBJCOPY = riscv64-unknown-elf-objcopy
+PREFIX = riscv64-unknown-elf
+CC = $(PREFIX)-gcc
+AS = $(PREFIX)-as
+LD = $(PREFIX)-ld
+OBJCOPY = $(PREFIX)-objcopy
 QEMU = qemu-system-riscv64
 
 # Compilation flags